IC AVR MCU 16K 8MHZ 3V 44TQFP

 

ATMEGA16L-8AU

Manufacturer Part NumberATMEGA16L-8AU
DescriptionIC AVR MCU 16K 8MHZ 3V 44TQFP
ManufacturerAtmel
SeriesAVR® ATmega
ATMEGA16L-8AU datasheets

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Specifications of ATMEGA16L-8AU

Core ProcessorAVRCore Size8-Bit
Speed8MHzConnectivityI²C, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o32
Program Memory Size16KB (8K x 16)Program Memory TypeFLASH
Eeprom Size512 x 8Ram Size1K x 8
Voltage - Supply (vcc/vdd)2.7 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case44-TQFP, 44-VQFPProcessor SeriesATMEGA16x
CoreAVR8Data Bus Width8 bit
Data Ram Size1 KBInterface TypeJTAG/SPI/UART
Maximum Clock Frequency8 MHzNumber Of Programmable I/os32
Number Of Timers3Operating Supply Voltage2.7 V to 5.5 V
Maximum Operating Temperature+ 85 CMounting StyleSMD/SMT
3rd Party Development ToolsEWAVR, EWAVR-BLMinimum Operating Temperature- 40 C
On-chip Adc8-ch x 10-bitFor Use WithATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
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ATMEGA16L-8MI PDF datasheetATMEGA16L-8MI PDF datasheet #2
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Features
•
High-performance, Low-power Atmel
•
Advanced RISC Architecture
– 131 Powerful Instructions – Most Single-clock Cycle Execution
– 32 × 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
– On-chip 2-cycle Multiplier
•
High Endurance Non-volatile Memory segments
– 16 Kbytes of In-System Self-programmable Flash program memory
– 512 Bytes EEPROM
– 1 Kbyte Internal SRAM
– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
– Programming Lock for Software Security
•
JTAG (IEEE std. 1149.1 Compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
•
Peripheral Features
– Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
Mode
– Real Time Counter with Separate Oscillator
– Four PWM Channels
– 8-channel, 10-bit ADC
8 Single-ended Channels
7 Differential Channels in TQFP Package Only
2 Differential Channels with Programmable Gain at 1x, 10x, or 200x
– Byte-oriented Two-wire Serial Interface
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
•
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby
and Extended Standby
•
I/O and Packages
– 32 Programmable I/O Lines
– 40-pin PDIP, 44-lead TQFP, and 44-pad QFN/MLF
•
Operating Voltages
– 2.7V - 5.5V for ATmega16L
– 4.5V - 5.5V for ATmega16
•
Speed Grades
– 0 - 8 MHz for ATmega16L
– 0 - 16 MHz for ATmega16
•
Power Consumption @ 1 MHz, 3V, and 25°C for ATmega16L
– Active: 1.1 mA
– Idle Mode: 0.35 mA
– Power-down Mode: < 1 µA
®
®
AVR
8-bit Microcontroller
(1)
8-bit
Microcontroller
with 16K Bytes
In-System
Programmable
Flash
ATmega16
ATmega16L
Summary
Rev. 2466TS–AVR–07/10

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ATMEGA16L-8AU Summary of contents

  • Page 1

    ... ATmega16L – 4.5V - 5.5V for ATmega16 • Speed Grades – MHz for ATmega16L – MHz for ATmega16 • Power Consumption @ 1 MHz, 3V, and 25°C for ATmega16L – Active: 1.1 mA – Idle Mode: 0.35 mA – Power-down Mode: < 1 µA ® ® AVR ...

  • Page 2

    Pin Figure 1. Pinout ATmega16 Configurations Disclaimer Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured on the same process technology. Min and Max values will be available after the device is ...

  • Page 3

    Overview The ATmega16 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega16 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize ...

  • Page 4

    ... Application Flash section is updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATmega16 is a powerful microcontroller that provides a highly-flexible and cost-effec- tive solution to many embedded control applications. The ATmega16 AVR is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation kits ...

  • Page 5

    Port B (PB7..PB0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins ...

  • Page 6

    ... Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. Note: Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. ...

  • Page 7

    Register Summary Address Name Bit 7 $3F ($5F) SREG I $3E ($5E) SPH – $3D ($5D) SPL SP7 Timer/Counter0 Output Compare Register $3C ($5C) OCR0 $3B ($5B) GICR INT1 $3A ($5A) GIFR INTF1 $39 ($59) TIMSK OCIE2 $38 ($58) TIFR ...

  • Page 8

    Address Name Bit 7 $01 ($21) TWSR TWS7 $00 ($20) TWBR Two-wire Serial Interface Bit Rate Register Notes: 1. When the OCDEN Fuse is unprogrammed, the OSCCAL Register is always accessed on this address. Refer to the debug- ger specific ...

  • Page 9

    Instruction Set Summary Mnemonics Operands Description ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...

  • Page 10

    Mnemonics Operands Description BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled DATA TRANSFER INSTRUCTIONS MOV Rd, Rr Move Between Registers MOVW Rd, Rr Copy Register Word LDI Rd, K Load Immediate LD Rd, X Load Indirect ...

  • Page 11

    Mnemonics Operands Description CLH Clear Half Carry Flag in SREG MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 2466TS–AVR–07/10 ATmega16(L) Flags Operation H ← None (see specific descr. for Sleep function) None (see ...

  • Page 12

    ... Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) 40P6 40-pin, 0.600” Wide, Plastic Dual Inline Package (PDIP) 44M1 44-pad, 7 × 7 × 1.0 mm body, lead pitch 0.50 mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) ATmega16(L) 12 Ordering Code Package (1) ATmega16L-8AU 44A (1) ATmega16L-8PU 40P6 (1) ATmega16L-8MU 44M1 (1) ATmega16-16AU ...

  • Page 13

    Packaging Information 44A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation ACB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and ...

  • Page 14

    A SEATING PLANE Notes: 1. This package conforms to JEDEC reference MS-011, Variation AC. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). ...

  • Page 15

    ... Marked Pin TOP VIEW BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 1 (SAW Singulation) VKKD-3. Package Drawing Contact: packagedrawings@atmel.com 2466TS–AVR–07/ Pin #1 Corner D2 Pin #1 Option A 1 Triangle 2 3 Option B Pin #1 Chamfer (C 0.30) Option C Pin #1 Notch e (0.20 R) TITLE 44M1, 44-pad 1.0 mm Body, Lead Pitch 0 ...

  • Page 16

    Errata The revision letter in this section refers to the revision of the ATmega16 device. ATmega16(L) Rev. • First Analog Comparator conversion may be delayed • Interrupts may be lost when writing the timer registers in the asynchronous timer M ...

  • Page 17

    Problem Fix/Workaround When the device has been powered or reset, disable then enable theAnalog Comparator before the first conversion. 2. Interrupts may be lost when writing the timer registers in the asynchronous timer The interrupt will be lost if a ...

  • Page 18

    Problem Fix / Workaround Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor 0x00 before writing to the asynchronous Timer Control Register(TCCRx), asynchronous Timer Counter Register(TCNTx), or asynchronous Output Compare Register(OCRx). 3. IDCODE masks data from ...

  • Page 19

    Problem Fix / Workaround – – – 4. Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request. Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR ...

  • Page 20

    Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request. Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR reg- ister triggers an unexpected EEPROM interrupt ...

  • Page 21

    ... Note 6 and Note 7 under have been removed. Rev. 2466S-05/09 1. Updated 2. Updated the last page with Atmel’s new adresses. Rev. 2466R-06/08 1. Added “Not recommended for new designs” note in Rev. 2466Q-05/08 1. Updated 71: – Removed the last section describing how to achieve a frequency with 50% duty 2 ...

  • Page 22

    Rev. 2466N-10/06 1. Updated 2. Updated 3. Updated page 4. Updated C code example in 5. Updated Rev. 2466M-04/06 1. Updated typos. 2. Updated 3. Updated Table 122 on page Rev. 2466L-06/05 1. Updated note in 2. Updated values for ...

  • Page 23

    Rev. 2466G-10/03 1. Removed “Preliminary” from the datasheet. 2. Changed ICP to ICP1 in the datasheet. 3. Updated 4. Updated assembly and C code examples in WDTCR” on page 5. Updated 6. Updated 7. Updated 8. Updated description for the ...

  • Page 24

    Added the 10. Added section 11. Added note about frequency variation when using an external clock. Note added in “External Clock” on page 12. Various minor TWI corrections. 13. Added “Power Consumption” data in 14. Added section 15. Added ...

  • Page 25

    Added JTAG version number for rev Added not regarding OCDEN Fuse below 10. Updated Programming Figures: Figure 127 on page 262 must be connected during Programming mode. how to program the fuses. 11. Added a note ...

  • Page 26

    ... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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