DSPIC33FJ128MC804-I/PT Microchip Technology, DSPIC33FJ128MC804-I/PT Datasheet - Page 84

• Manufacturer Part Number: DSPIC33FJ128MC804-I/PT
• Description: IC DSPIC MCU/DSP 128K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC804-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (128K x 8)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b, D/A 6x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Data Ram Size: 16 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
TABLE 6-2:
6.2
A Power-on Reset (POR) circuit ensures the device is
reset from power-on. The POR circuit is active until
V
has elapsed. The delay T
device bias circuits become stable.
The device supply voltage characteristics must meet
the
requirements to
Section 30.0 “Electrical Characteristics”
The POR status bit (POR) in the Reset Control register
(RCON<0>) is set to indicate the Power-on Reset.
DS70292E-page 84
V
T
V
T
T
T
DD
POR
BOR
PWRT
FSCM
POR
BOR
Note:
crosses the V
specified
Power-on Reset (POR)
When the device exits the Reset condi-
tion (begins normal operation), the
device operating parameters (voltage,
frequency, temperature, etc.) must be
within their operating ranges, otherwise
the device may not function correctly.
The user application must ensure that
the delay between the time power is
first applied, and the time SYSRST
becomes inactive, is long enough to get
all
specification.
Symbol
starting
OSCILLATOR DELAY
operating
POR
generate
threshold and the delay T
voltage
POR
the
parameters
ensures the internal
POR.
POR threshold
POR extension time
BOR threshold
BOR extension time
Programmable power-up time delay
Fail-Safe Clock Monitor Delay
and
for details.
rise
Refer
within
POR
rate
Parameter
to
6.2.1
The on-chip regulator has a Brown-out Reset (BOR)
circuit that resets the device when the V
(V
cuit keeps the device in Reset until V
threshold and the delay T
T
stable.
The BOR status bit (BOR) in the Reset Control register
(RCON<1>) is set to indicate the Brown-out Reset.
The device will not run at full speed after a BOR as the
V
operation. The PWRT provides power-up time delay
(T
stabilized at the appropriate levels for full-speed
operation before the SYSRST is released.
The power-up timer delay (T
the
(FPWRT<2:0>) in the POR Configuration register
(FPOR<2:0>), which provides eight settings (from 0 ms
to 128 ms). Refer to
for further details.
Figure 6-3
reset delay (T
rises above the V
BOR
DD
PWRT
DD
< V
should rise to acceptable levels for full-speed
Power-on
ensures the voltage regulator output becomes
) to ensure that the system power supplies have
BOR
shows the typical brown-out scenarios. The
Brown-out Reset (BOR) and
Power-up timer (PWRT)
) for proper device operation. The BOR cir-
1.8V nominal
30 μs maximum
2.5V nominal
100 μs maximum
0-128 ms nominal
900 μs maximum
BOR
BOR
Reset
+ T
Section 27.0 “Special Features”
PWRT
trip point
© 2011 Microchip Technology Inc.
BOR
Timer
) is initiated each time V
PWRT
Value
has elapsed. The delay
Value
) is programmed by
DD
crosses V
DD
Select
is too low
BOR
bits
DD