ATMEGA1284P-PU Atmel, ATMEGA1284P-PU Datasheet - Page 295

MCU AVR 128K ISP FLASH 40-PDIP

ATMEGA1284P-PU

Manufacturer Part Number
ATMEGA1284P-PU
Description
MCU AVR 128K ISP FLASH 40-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA1284P-PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRRAVEN, ATAVRRZUSBSTICK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
4KB
Ram Memory Size
16KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA1284P-PU
Manufacturer:
LUCENT
Quantity:
32
8059D–AVR–11/09
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
The bit coding is shown in
When pulsing WR or OE, the command loaded determines the action executed. The different
commands are shown in
Figure 25-1. Parallel Programming
Note:
Table 25-9.
Programming Mode
Signal Name in
RDY/BSY
1. Unused Pins should be left floating.
PAGEL
DATA
BS1
XA0
XA1
BS2
WR
OE
Pin Name Mapping
Table 25-13 on page
RDY/BSY
Pin Name
Table 25-12 on page
PAGEL
+12 V
PB7-0
BS2
PD1
PD2
PD3
PD4
PD5
PD6
PD7
BS1
XA0
XA1
PA0
WR
OE
(1)
I/O
I/O
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RESET
XTAL1
GND
O
PA0
I
I
I
I
I
I
I
Function
0: Device is busy programming, 1: Device is ready for
new command.
Output Enable (Active low).
Write Pulse (Active low).
Byte Select 1.
XTAL Action Bit 0
XTAL Action Bit 1
Program Memory and EEPROM data Page Load.
Byte Select 2.
Bi-directional Data bus (Output when OE is low).
296.
296.
PB7 - PB0
AVCC
VCC
+5V
+5V
DATA
ATmega1284P
295

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