PIC16C71/JW Microchip Technology, PIC16C71/JW Datasheet - Page 24

• Manufacturer Part Number: PIC16C71/JW
• Description: IC MCU EPROM 1KX14 A/D 18CDIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C71/JW

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 13
• Program Memory Size: 1.75KB (1K x 14)
• Program Memory Type: EPROM, UV
• Ram Size: 36 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 4x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-CDIP (0.300", 7.62mm) Window
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Connectivity: -
• Other names: PIC16C71-16/JW; PIC16C71-16/JW; PIC16C71-20/JW

PIC16C71X
Example 4-1 shows the calling of a subroutine in
page 1 of the program memory. This example assumes
that PCLATH is saved and restored by the interrupt ser-
vice routine (if interrupts are used).
EXAMPLE 4-1:
ORG 0x500
BSF
BCF
CALL
ORG 0x900
SUB1_P1:
RETURN
FIGURE 4-15:
DS30272A-page 24
RP1:RP0
bank select
For register file map detail see Figure 4-4.
Note 1:
PCLATH,3
PCLATH,4
SUB1_P1
:
:
:
:
:
location select
6
Direct Addressing
The RP1 and IRP bits are reserved, always maintain these bits clear.
Data
Memory
DIRECT/INDIRECT ADDRESSING
CALL OF A SUBROUTINE IN
PAGE 1 FROM PAGE 0
;Select page 1 (800h-FFFh)
;Only on >4K devices
;Call subroutine in
;page 1 (800h-FFFh)
;called subroutine
;page 1 (800h-FFFh)
;return to Call subroutine
;in page 0 (000h-7FFh)
from opcode
00h
7Fh
Bank 0
00
0
80h
FFh
Bank 1
01
100h
17Fh
Bank 2
10
4.5
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF reg-
ister. Any instruction using the INDF register actually
accesses the register pointed to by the File Select Reg-
ister, FSR. Reading the INDF register itself indirectly
(FSR = '0') will read 00h. Writing to the INDF register
indirectly results in a no-operation (although status bits
may be affected). An effective 9-bit address is obtained
by concatenating the 8-bit FSR register and the IRP bit
(STATUS<7>), as shown in Figure 4-15. However, IRP
is not used in the PIC16C71X devices.
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 4-2.
EXAMPLE 4-2:
NEXT
CONTINUE
Used
Not
180h
1FFh
Bank 3
11
Indirect Addressing, INDF and FSR
Registers
movlw
movwf
clrf
incf
btfss
goto
:
IRP
bank select
(1)
0x20
FSR
INDF
FSR,F
FSR,4
NEXT
INDIRECT ADDRESSING
7
Indirect Addressing
1997 Microchip Technology Inc.
;initialize pointer
;to RAM
;clear INDF register
;inc pointer
;all done?
;no clear next
;yes continue
FSR register
location select
0