PIC18LF4539-I/PT Microchip Technology, PIC18LF4539-I/PT Datasheet - Page 52

• Manufacturer Part Number: PIC18LF4539-I/PT
• Description: IC MCU FLASH 12KX16 EE AD 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4539-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 24KB (12K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1408 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1408 B
• Interface Type: I2C, SPI, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PIC18FXX39
4.14
The Reset Control (RCON) register contains flag bits
that allow differentiation between the sources of a
device RESET. These flags include the TO, PD, POR,
BOR and RI bits. This register is readable and writable.
For PIC18FXX39 devices, the IPEN bit must always be
set (= 1) for the ProMPT kernel to function correctly.
Refer to Section 8.0 (page 69) for a more detailed
discussion.
REGISTER 4-3:
DS30485A-page 50
RCON Register
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
RCON REGISTER
IPEN: Interrupt Priority Enable bit
Always maintain this bit set for proper operation of ProMPT kernel.
Unimplemented: Read as '0'
RI: RESET Instruction Flag bit
1 = The RESET instruction was not executed
0 = The RESET instruction was executed causing a device RESET
TO: Watchdog Time-out Flag bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down Detection Flag bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
POR: Power-on Reset Status bit
1 = A Power-on Reset has not occurred
0 = A Power-on Reset occurred
BOR: Brown-out Reset Status bit
1 = A Brown-out Reset has not occurred
0 = A Brown-out Reset occurred
Legend:
R = Readable bit
- n = Value at POR
bit 7
R/W-0
IPEN
(must be set in software after a Brown-out Reset occurs)
(must be set in software after a Power-on Reset occurs)
(must be set in software after a Brown-out Reset occurs)
U-0
—
U-0
Preliminary
—
W = Writable bit
‘1’ = Bit is set
R/W-1
RI
Note 1: If the BOREN configuration bit is set
2: It is recommended that the POR bit be set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
TO
(Brown-out Reset enabled), the BOR bit is
‘1’ on a Power-on Reset. After a Brown-
out Reset has occurred, the BOR bit will
be cleared, and must be set by firmware to
indicate the occurrence of the next
Brown-out Reset.
after a Power-on Reset has been
detected, so that subsequent Power-on
Resets may be detected.
R-1
PD
 2002 Microchip Technology Inc.
x = Bit is unknown
R/W-0
POR
R/W-0
BOR
bit 0