C8051F412-GQ Silicon Laboratories Inc, C8051F412-GQ Datasheet - Page 205

• Manufacturer Part Number: C8051F412-GQ
• Description: IC 8051 MCU 16K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F41xr

Specifications of C8051F412-GQ

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 32-LQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 24
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.25 V
• Data Converters: A/D 20x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F4x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F410DK
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 2-ch x 12-bit
• No. Of I/o's: 24
• Ram Memory Size: 2368Byte
• Cpu Speed: 50MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Package: 32LQFP
• Device Core: 8051
• Family Name: C8051F41x
• Maximum Speed: 50 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1453 - ADAPTER PROGRAM TOOLSTICK F410336-1317 - KIT EVAL FOR C8051F411336-1314 - KIT DEV FOR C8051F41X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1310

1000
1110
1100
Values Read
0
0
0
1
0
0
0
0
X A master START was generated.
X
0
1
Current SMbus State
A master data or address byte
was transmitted; NACK received.
A master data or address byte
was transmitted; ACK received.
A master data byte was received;
ACK requested.
Table 21.4. SMBus Status Decoding
Rev. 1.1
Typical Response Options
Load slave address + R/W
into SMB0DAT.
Set STA to restart transfer.
Abort transfer.
Load next data byte into
SMB0DAT.
End transfer with STOP.
End transfer with STOP and
start another transfer.
Send repeated START.
Switch to Master Receiver
Mode (clear SI without writ-
ing new data to SMB0DAT).
Acknowledge received byte;
Read SMB0DAT.
Send NACK to indicate last
byte, and send STOP.
Send NACK to indicate last
byte, and send STOP fol-
lowed by START.
Send ACK followed by
repeated START.
Send NACK to indicate last
byte, and send repeated
START.
Send ACK and switch to
Master Transmitter Mode
(write to SMB0DAT before
clearing SI).
Send NACK and switch to
Master Transmitter Mode
(write to SMB0DAT before
clearing SI).
C8051F410/1/2/3
0
1
0
0
0
1
1
0
0
0
1
1
1
0
0
Written
Values
0
0
1
0
1
1
0
0
0
1
1
0
0
0
0
X
X
X
X
X
X
X
X
205
1
0
0
1
0
1
0