PIC16C716-20I/P Microchip Technology, PIC16C716-20I/P Datasheet - Page 97

• Manufacturer Part Number: PIC16C716-20I/P
• Description: IC MCU OTP 2KX14 A/D PWM 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C716-20I/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4 bit
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1059 - ADAPTER 18 ZIF BD W/18SO PLUGSDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

APPENDIX A: REVISION HISTORY
APPENDIX B: CONVERSION
There are no previous versions of this device.
APPENDIX C: MIGRATION FROM
This section discusses how to migrate from a baseline
device (i.e., PIC16C5X) to a mid-range device (i.e.,
PIC16CXXX).
The following are the list of modifications over the
PIC16C5X microcontroller family:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Wake-up from Sleep through interrupt is added.
© 2005 Microchip Technology Inc.
Version
Instruction word length is increased to 14-bits.
This allows larger page sizes both in program
memory (2K now as opposed to 512 before) and
register file (128 bytes now versus 32 bytes
before).
A PC high latch register (PCLATH) is added to
handle program memory paging. Bits PA2, PA1,
PA0 are removed from STATUS register.
Data memory paging is redefined slightly.
STATUS register is modified.
Four new instructions have been added:
RETURN, RETFIE, ADDLW, and SUBLW.
Two instructions TRIS and OPTION are being
phased out although they are kept for compati-
bility with PIC16C5X.
OPTION_REG and TRIS registers are made
addressable.
Interrupt capability is added. Interrupt vector is
at 0004h.
Stack size is increased to 8 deep.
Reset vector is changed to 0000h.
Reset of all registers is revisited. Five different
Reset (and wake-up) types are recognized.
Registers are reset differently.
A
B
Date
2/99
9/05
This is a new data sheet. How-
ever, the devices described in this
data sheet are the upgrades to
the devices found in the
PIC16C6X Data Sheet,
DS30234, and the PIC16C7X
Data Sheet, DS30390.
Removed Preliminary Status.
CONSIDERATIONS
BASE-LINE TO
MID-RANGE DEVICES
Revision Description
11. Two separate timers, Oscillator Start-up Timer
12. PORTB has weak pull-ups and interrupt on
13. T0CKI pin is also a port pin (RA4) now.
14. FSR is made a full eight-bit register.
15. “In-circuit serial programming” is made possible.
16. PCON STATUS register is added with a Power-
17. Code protection scheme is enhanced such that
18. Brown-out protection circuitry has been added.
To convert code written for PIC16C5X to PIC16CXXX,
the user should take the following steps:
1.
2.
3.
4.
5.
(OST) and Power-up Timer (PWRT) are
included for more reliable power-up. These
timers are invoked selectively to avoid unneces-
sary delays on power-up and wake-up.
change feature.
The user can program PIC16CXX devices using
only five pins: V
and RB7 (data in/out).
on Reset Status bit (POR).
portions of the program memory can be
protected, while the remainder is unprotected.
Controlled by Configuration Word bit BODEN.
Brown-out Reset ensures the device is placed in
a Reset condition if V
setpoint.
Remove any program memory page select
operations (PA2, PA1, PA0 bits) for CALL, GOTO.
Revisit any computed jump operations (write to
PC or add to PC, etc.) to make sure page bits
are set properly under the new scheme.
Eliminate any data memory page switching.
Redefine data variables to reallocate them.
Verify all writes to STATUS, OPTION, and FSR
registers since these have changed.
Change Reset vector to 0000h.
PIC16C712/716
DD
, V
SS
, MCLR/V
DD
dips below a fixed
DS41106B-page 95
PP
, RB6 (clock)