C8051T603-GS Silicon Laboratories Inc, C8051T603-GS Datasheet - Page 162

• Manufacturer Part Number: C8051T603-GS
• Description: IC 8051 MCU 4K-EEPROM 14-SOIC
• Manufacturer: Silicon Laboratories Inc
• Series: C8051T60xr

Specifications of C8051T603-GS

• Program Memory Type: OTP
• Program Memory Size: 4KB (4K x 8)
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051T6x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SMBus/UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 8
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051T600DK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1404 - KIT DEV FOR C8051T60X MCU'S
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1657-5

C8051T600/1/2/3/4/5/6
26.2. PCA0 Interrupt Sources
Figure 26.3 shows a diagram of the PCA interrupt tree. There are four independent event flags that can be
used to generate a PCA0 interrupt. They are: the main PCA counter overflow flag (CF), which is set upon
a 16-bit overflow of the PCA0 counter, and the individual flags for each PCA channel (CCF0, CCF1, and
CCF2), which are set according to the operation mode of that module. These event flags are always set
when the trigger condition occurs. Each of these flags can be individually selected to generate a PCA0
interrupt, using the corresponding interrupt enable flag (ECF for CF and ECCFn for each CCFn). PCA0
interrupts must be globally enabled before any individual interrupt sources are recognized by the proces-
sor. PCA0 interrupts are globally enabled by setting the EA bit and the EPCA0 bit to logic 1.
162
PCA Counter/Timer 16-
bit Overflow
W
M
P
1
6
n
PCA Module 0
PCA Module 1
PCA Module 2
(for n = 0 to 2)
PCA0CPMn
E
C
O
M
n
C
A
P
P
n
(CCF0)
(CCF1)
(CCF2)
C
A
P
N
n
M
A
T
n
O
G
T
n
P
W
M
n
C
C
E
F
n
C
F
C
R
PCA0CN
Figure 26.3. PCA Interrupt Block Diagram
C
C
F
2
C
C
F
1
C
C
F
0
ECCF0
ECCF1
ECCF2
C
D
L
I
W
D
T
E
PCA0MD
W
D
C
K
L
C
P
S
2
C
P
S
1
0
1
0
1
0
1
C
P
S
0
E
C
F
0
1
Rev. 1.2
EPCA0
0
1
EA
0
1
Interrupt
Priority
Decoder