C8051F817-GS Silicon Laboratories Inc, C8051F817-GS Datasheet - Page 227

no-image

C8051F817-GS

Manufacturer Part Number
C8051F817-GS
Description
IC MCU 8BIT 8K FLASH 16SOIC
Manufacturer
Silicon Laboratories Inc
Series
C8051F81xr
Datasheet

Specifications of C8051F817-GS

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (3.9mm Width)
Processor Series
C8051F8x
Core
8051
Data Bus Width
16 bit
Data Ram Size
512 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F800DK
Minimum Operating Temperature
- 55 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
336-1792-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F817-GS
Manufacturer:
MAXIM
Quantity:
329
Part Number:
C8051F817-GS
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
29.2. PCA0 Interrupt Sources
Figure 29.3 shows a diagram of the PCA interrupt tree. There are five independent event flags that can be
used to generate a PCA0 interrupt. They are: the main PCA counter overflow flag (CF), which is set upon
a 16-bit overflow of the PCA0 counter, an intermediate overflow flag (COVF), which can be set on an over-
flow from the 8th through 15th bit of the PCA0 counter, and the individual flags for each PCA channel
(CCF0, CCF1, and CCF2), which are set according to the operation mode of that module. These event
flags are always set when the trigger condition occurs. Each of these flags can be individually selected to
generate a PCA0 interrupt, using the corresponding interrupt enable flag (ECF for CF, ECOV for COVF,
and ECCFn for each CCFn). PCA0 interrupts must be globally enabled before any individual interrupt
sources are recognized by the processor. PCA0 interrupts are globally enabled by setting the EA bit in the
IE register and the EPCA0 bit in the EIE1 register to logic 1.
PCA Counter/Timer 8-bit
through 15-bit Overflow
PCA Counter/Timer 16-
bit Overflow
P
W
M
1
6
n
PCA Module 0
PCA Module 1
PCA Module 2
(for n = 0 to 2)
PCA0CPMn
E
C
O
M
n
C
A
P
P
n
(CCF0)
(CCF1)
(CCF2)
C
N
A
P
n
M
A
T
n
O
G
T
n
P
W
M
n
E
C
C
F
n
C
F
C
R
PCA0CN
Figure 29.3. PCA Interrupt Block Diagram
C
C
F
2
C
C
F
1
C
C
F
0
ECCF0
ECCF1
ECCF2
C
D
L
I
W
D
T
E
PCA0MD
W
D
C
K
L
C
P
S
2
C
P
S
1
0
1
0
1
0
1
C
P
S
0
E
C
F
0
1
Rev. 1.0
A
R
S
E
L
E
C
O
V
PCA0PWM
C
O
V
F
0
1
E
A
R
1
6
C
L
S
E
L
2
C
S
E
L
L
1
C
S
E
L
L
0
Set 8 through 15 bit Operation
C8051F80x-83x
EPCA0
0
1
EA
0
1
Interrupt
Priority
Decoder
227

Related parts for C8051F817-GS