C8051F704-GM Silicon Laboratories Inc, C8051F704-GM Datasheet - Page 304

IC 8051 MCU 15K FLASH 48-QFN

C8051F704-GM

Manufacturer Part Number
C8051F704-GM
Description
IC 8051 MCU 15K FLASH 48-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F70xr
Datasheets

Specifications of C8051F704-GM

Program Memory Type
FLASH
Program Memory Size
15KB (15K x 8)
Package / Case
48-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, Temp Sensor, WDT
Number Of I /o
39
Eeprom Size
32 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F7x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
39
Number Of Timers
4 x 16 bit
Operating Supply Voltage
1.8 V to 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F700DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1635 - DEV KIT FOR C8051F700
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1610-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F704-GM
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
C8051F70x/71x
35.2. C2CK Pin Sharing
The C2CK pin is shared with the RST signal on this device family. If the RST pin is used by other parts of
the system, debugging and programming the device can still be accomplished without disrupting the rest of
the system. If this is desired, it is normally necessary to add a resistor to isolate the system’s reset line
from the C2CK signal. This external resistors would not be necessary for production boards, where debug-
ging capabilities are not needed. A typical isolation configuration is shown in Figure 35.1.
The configuration in Figure 35.1 assumes the RST pin on the target device is used as an input only. Addi-
tional resistors may be necessary depending on the specific application.
304
RST
Figure 35.1. Typical C2CK Pin Sharing
C2 Interface Master
Rev. 1.0
C2CK
C2D

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