C8051F704-GM Silicon Laboratories Inc, C8051F704-GM Datasheet - Page 94

IC 8051 MCU 15K FLASH 48-QFN

C8051F704-GM

Manufacturer Part Number
C8051F704-GM
Description
IC 8051 MCU 15K FLASH 48-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F70xr
Datasheets

Specifications of C8051F704-GM

Program Memory Type
FLASH
Program Memory Size
15KB (15K x 8)
Package / Case
48-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, Temp Sensor, WDT
Number Of I /o
39
Eeprom Size
32 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F7x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
39
Number Of Timers
4 x 16 bit
Operating Supply Voltage
1.8 V to 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F700DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1635 - DEV KIT FOR C8051F700
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1610-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F704-GM
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
C8051F70x/71x
SFR Definition 15.10. CS0MD1: Capacitive Sense Mode 1
SFR Address = 0xAD; SFR Page = 0
94
Name
Reset
7:6
5:4
2:0
Bit
Type
3
Bit
CS0CG[2:0]
CS0DR[1:0]
Unused
Unused
Name
7
0
R
Read = 00b; Write = Don’t care
CS0 Double Reset Select.
These bits adjust the secondary CS0 reset time. For most touch-sensitive
switches, the default (fastest) value is sufficient, and these bits should not be
modified.
00: No additional time is used for secondary reset (recommended for most
switches)
01: An additional 0.75 µs is used for secondary reset.
10: An additional 1.5 µs is used for secondary reset.
11: An additional 2.25 µs is used for secondary reset.
Read = 0b; Write = Don’t care
CS0 Reference Gain Select.
These bits select the "gain" applied to the current used to charge an internal refer-
ence capacitor. Lower gain values decrease the current setting, and increase
both the size of the capacitance that can be measured with the CS0 module, and
the base conversion time. Refer to “15.2. CS0 Gain Adjustment” on page 81 for
more information.
000: Gain = 1x
001: Gain = 2x
010: Gain = 3x
011: Gain = 4x
100: Gain = 5x
101: Gain = 6x
110: Gain = 7x
111: Gain = 8x (default)
6
0
5
0
CS0DR[1:0]
R/W
Rev. 1.0
4
0
Description
R
3
0
R/W
2
1
CS0CG[2:0]
R/W
1
1
R/W
0
1

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