HD64F3672FXV Renesas Electronics America, HD64F3672FXV Datasheet - Page 167

IC H8/3672 MCU FLASH 48LQFP

HD64F3672FXV

Manufacturer Part Number
HD64F3672FXV
Description
IC H8/3672 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets

Specifications of HD64F3672FXV

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
48-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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2.2.47 (3) ROTL (L)
Notes
ROTL (ROTate Left)
Operation
ERd (left rotation)
Assembly-Language Format
ROTL.L ERd
Operand Size
Longword
Description
This instruction rotates the bits in a 32-bit register ERd (destination register) one bit to the left.
The most significant bit is rotated to the least significant bit (bit 0), and also copied to the carry
flag.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Register direct
Addressing
Mode
Mnemonic
ROTL.L
C
ERd
Operands
MSB
b
31
ERd
1st byte
1
. . . . . .
2
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Always cleared to 0.
C: Receives the previous value in bit 31.
2nd byte
B
cleared to 0.
cleared to 0.
Instruction Format
— —
Rev. 3.00 Dec 13, 2004 page 151 of 258
I
0 erd
UI
Section 2 Instruction Descriptions
— —
H
3rd byte
LSB
b
0
U
N
4th byte
REJ09B0213-0300
Z
V
0
States
No. of
Rotate
C
2

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