HD64F3672FXV Renesas Electronics America, HD64F3672FXV Datasheet - Page 91

IC H8/3672 MCU FLASH 48LQFP

HD64F3672FXV

Manufacturer Part Number
HD64F3672FXV
Description
IC H8/3672 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets

Specifications of HD64F3672FXV

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
48-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3672FXV
Manufacturer:
Renesas
Quantity:
1 000
Part Number:
HD64F3672FXV
Manufacturer:
RENESAS
Quantity:
1 500
Part Number:
HD64F3672FXV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3672FXV
Manufacturer:
RENESAS
Quantity:
1 000
Part Number:
HD64F3672FXV
Manufacturer:
RENSAS-PB
Quantity:
595
Part Number:
HD64F3672FXV
Manufacturer:
RENESAS/PBF
Quantity:
52
2.2.22 (3) CMP (L)
Notes
CMP (CoMPare)
Operation
ERd – (EAs), set CCR
Assembly-Language Format
CMP.L <EAs>, ERd
Operand Size
Longword
Description
This instruction subtracts the source operand from the contents of a 32-bit register ERd
(destination register) and sets or clears the CCR bits according to the result. The contents of the
32-bit register ERd remain unchanged.
Available Registers
ERd: ER0 to ER7
ERs: ER0 to ER7
Operand Format and Number of States Required for Execution
Immediate
Register direct
Addressing
Mode
Mnemonic Operands
CMP.L
CMP.L
#xx:32, ERd
ERs, ERd
1st byte
7
1
A
F
1 ers 0 erd
2nd byte
2
0 erd
Condition Code
I: Previous value remains unchanged.
H: Set to 1 if there is a borrow at bit 27;
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Set to 1 if an overflow occurs; otherwise
C: Set to 1 if there is a borrow at bit 31;
3rd byte
Instruction Format
otherwise cleared to 0.
cleared to 0.
cleared to 0.
cleared to 0.
otherwise cleared to 0.
— —
I
Rev. 3.00 Dec 13, 2004 page 75 of 258
UI
Section 2 Instruction Descriptions
4th byte
H
IMM
U
5th byte
N
REJ09B0213-0300
Z
6th byte
V
Compare
C
States
No. of
6
2

Related parts for HD64F3672FXV