PIC16LF1826-I/SS Microchip Technology, PIC16LF1826-I/SS Datasheet - Page 94

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PIC16LF1826-I/SS

Manufacturer Part Number
PIC16LF1826-I/SS
Description
IC MCU 8BIT FLASH 20SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets

Specifications of PIC16LF1826-I/SS

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Controller Family/series
PIC16LF
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
32MHz
No. Of Timers
3
Interface
EUSART, I2C, SPI
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
On-chip Dac
5 bit
A/d Bit Size
10 bit
A/d Channels Available
12
Height
1.75 mm
Length
7.2 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Width
5.3 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16F/LF1826/27
8.5.4
The PIE3 register contains the interrupt enable bits, as
shown in Register 8-4.
REGISTER 8-4:
DS41391C-page 94
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
This register is only available on PIC16F/LF1827.
PIE3 REGISTER
Unimplemented: Read as ‘0’
CCP4IE: CCP4 Interrupt Enable bit
1 = Enables the CCP4 interrupt
0 = Disables the CCP4 interrupt
CCP3IE: CCP3 Interrupt Enable bit
1 = Enables the CCP3 interrupt
0 = Disables the CCP3 interrupt
TMR6IE: TMR6 to PR6 Match Interrupt Enable bit
1 = Enables the TMR6 to PR6 Match interrupt
0 = Disables the TMR6 to PR6 Match interrupt
Unimplemented: Read as ‘0’
TMR4IE: TMR4 to PR4 Match Interrupt Enable bit
1 = Enables the TMR4 to PR4 Match interrupt
0 = Disables the TMR4 to PR4 Match interrupt
Unimplemented: Read as ‘0’
U-0
PIE3: PERIPHERAL INTERRUPT ENABLE REGISTER 3
(1)
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
CCP4IE
R/W-0/0
CCP3IE
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
TMR6IE
R/W-0/0
Note 1: The PIE3 register is available only on the
2: Bit PEIE of the INTCON register must be
PIC16F/LF1827 device.
set to enable any peripheral interrupt.
U-0
 2010 Microchip Technology Inc.
(1)
R/W-0/0
TMR4IE
U-0
bit 0

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