PIC16F716-I/SS Microchip Technology, PIC16F716-I/SS Datasheet - Page 11

• Manufacturer Part Number: PIC16F716-I/SS
• Description: IC PIC MCU FLASH 2KX14 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F716-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 8-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPI3-DB16F716 - BOARD DAUGHTER ICEPIC3AC164307 - MODULE SKT FOR PM3 28SSOPAC162054 - HEADER INTERFACE ICD2 16F716AC164018 - MODULE SKT PROMATEII 20SSOP
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.2.2
The Special Function Registers are registers used by
the CPU and peripheral modules for controlling the
desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
give in Table 2-1.
The Special Function Registers can be classified into
two sets; core (CPU) and peripheral. Those registers
associated with the core functions are described in
detail in this section. Those related to the operation of
the peripheral features are described in detail in that
peripheral feature section.
TABLE 2-1:
 2003 Microchip Technology Inc.
00h
01h
02h
03h
04h
05h
06h
07h-09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h-14h
15h
16h
17h
18h
19h
1Ah-1Dh
1Eh
1Fh
Legend:
Note
Address
1:
2:
3:
4:
5:
6:
7:
8:
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
TMR2
T2CON
CCPR1L
CCPR1H
CCP1CON
PWM1CON
ECCPAS
ADRES
ADCON0
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, Shaded locations are unimplemented,
read as ‘0’.
These registers can be addressed from either bank.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for PC<12:8> whose contents are
transferred to the upper byte of the program counter.
Other (non Power-up) Resets include: external Reset through MCLR and the Watchdog Timer Reset.
The IRP and RP1 bits are reserved. Always maintain these bits clear.
On any device Reset, these pins are configured as inputs.
This is the value that will be in the port output latch.
Reserved bits, do not use.
ECCPAS1 bit is not used on PIC16F716.
SPECIAL FUNCTION REGISTERS
Name
(1)
(1)
(1)
—
—
—
—
(5,6)
(5,6)
(1)
(1)
(1,2)
SPECIAL FUNCTION REGISTER SUMMARY BANK 0
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 module’s register
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
PORTB Data Latch when written: PORTB pins when read
Unimplemented
Unimplemented
Holding register for the Least Significant Byte of the 16-bit TMR1 register
Holding register for the Most Significant Byte of the 16-bit TMR1 register
Unimplemented
Capture/Compare/PWM Register 1 (LSB)
Capture/Compare/PWM Register 1 (MSB)
ECCPASE ECCPAS2
Unimplemented
A/D Result Register
PRSEN
ADCS1
IRP
P1M1
Bit 7
GIE
—
—
—
—
—
(4)
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0
ADCS0
RP1
PDC6
P1M0
Bit 6
PEIE
ADIF
—
—
—
(4)
T1CKPS1
DC1B1
PDC5
CHS2
Bit 5
T0IE
RP0
—
—
—
—
(7)
(8)
Timer2 module’s register
Preliminary
PORTA Data Latch when written: PORTA pins when read
ECCPAS0
T1CKPS0 T1OSCEN
DC1B0
PDC4
CHS1
Bit 4
Write Buffer for the upper 5 bits of the Program Counter
INTE
TO
—
CCP1M3
PSSAC1
PDC3
CHS0
RBIE
Bit 3
PD
—
GO/DONE
TMR2ON
CCP1M2
T1SYNC
PSSAC0
CCP1IF
PDC2
Bit 2
T0IF
Z
T2CKPS1
TMR1CS
CCP1M1
PSSBD1
TMR2IF
PDC1
Bit 1
INTF
—
DC
(7)
PIC16F716
T2CKPS0
TMR1ON
CCP1M0
PSSBD0
TMR1IF
ADON
PDC0
Bit 0
RBIF
C
0000 0000
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
--xx 0000
xxxx xxxx
---0 0000
0000 000x
-0-- 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
-000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
00-0 0000
xxxx xxxx
0000 0000
DS41206A-page 9
POR, BOR
Value on:
—
—
—
—
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