PIC16F716-I/SS Microchip Technology, PIC16F716-I/SS Datasheet - Page 12

• Manufacturer Part Number: PIC16F716-I/SS
• Description: IC PIC MCU FLASH 2KX14 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F716-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 8-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPI3-DB16F716 - BOARD DAUGHTER ICEPIC3AC164307 - MODULE SKT FOR PM3 28SSOPAC162054 - HEADER INTERFACE ICD2 16F716AC164018 - MODULE SKT PROMATEII 20SSOP
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F716
TABLE 2-2:
DS41206A-page 10
80h
81h
82h
83h
84h
85h
86h
87h-89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh-91h
92h
93h-9Eh
9Fh
Legend:
Note
Address
1:
2:
3:
4:
5:
6:
7:
INDF
OPTION_REG
PCL
STATUS
FSR
TRISA
TRISB
PCLATH
INTCON
PIE1
PCON
PR2
ADCON1
These registers can be addressed from either bank.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for PC<12:8> whose contents are
transferred to the upper byte of the program counter.
Other (non Power-up) Resets include: external Reset through MCLR and the Watchdog Timer Reset.
The IRP and RP1 bits are reserved. Always maintain these bits clear.
On any device Reset, these pins are configured as inputs.
This is the value that will be in the port output latch.
Reserved bits, do not use.
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0', Shaded locations are unimplemented,
read as ‘0’.
Name
(1)
(1)
(1)
—
—
—
—
(1)
(1)
(1,2)
SPECIAL FUNCTION REGISTER SUMMARY BANK 1
Addressing this location uses contents of FSR to address data memory (not a physical register)
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
PORTB Data Direction Register
Unimplemented
Unimplemented
Unimplemented
Timer2 Period Register
Unimplemented
RBPU
IRP
Bit 7
GIE
—
—
—
—
—
(4)
INTEDG
RP1
PEIE
ADIE
Bit 6
—
—
—
—
(4)
T0CS
Bit 5
—
T0IE
RP0
—
—
—
—
(7)
PORTA Data Direction Register
Write Buffer for the upper 5 bits of the Program Counter
Preliminary
T0SE
Bit 4
INTE
TO
—
—
—
RBIE
Bit 3
PSA
PD
—
—
—
CCP1IE
PCFG2
Bit 2
T0IF
PS2
—
Z
TMR2IE
PCFG1
INTF
Bit 1
POR
PS1
DC
 2003 Microchip Technology Inc.
TMR1IE
PCFG0
Bit 0
RBIF
BOR
PS0
C
0000 0000
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
--11 1111
1111 1111
---0 0000
0000 000x
-0-- -000
---- --qq
1111 1111
---- -000
POR, BOR
Value on:
—
—
—
—
32, 36
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