PIC16C770-I/P Microchip Technology, PIC16C770-I/P Datasheet - Page 101

IC MCU CMOS A/D 2K 20MHZ 20-DIP

PIC16C770-I/P

Manufacturer Part Number
PIC16C770-I/P
Description
IC MCU CMOS A/D 2K 20MHZ 20-DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C770-I/P

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 6x12b
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
16
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
No. Of
RoHS Compliant
Core
PIC
Processor Series
PIC16C
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Data Ram Size
256 B
Data Rom Size
256 B
On-chip Adc
6 bit
Number Of Programmable I/os
16
Number Of Timers
3 bit
Operating Supply Voltage
2.5 V to 5.5 V
Mounting Style
Through Hole
Height
3.3 mm
Interface Type
I2C, SPI, SSP
Length
26.16 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA16XP200 - ADAPTER ICE 20DIP/SOIC/SSOPAC164028 - MODULE SKT PROMATEII 20SOIC/DIP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC16C770I/P
9.2.18
For Standard mode I
resistors R
lowing parameters
• Supply voltage
• Bus capacitance
• Number of connected devices (input current +
The supply voltage limits the minimum value of resistor
R
at V
FIGURE 9-31:
TABLE 9-3:
Legend:
p
10Bh,18Bh
2002 Microchip Technology Inc.
leakage current).
Note: I
0Bh, 8Bh,
Address
due to the specified minimum sink current of 3 mA
OL
0Ch
8Ch
0Dh
8Dh
13h
14h
91h
94h
93h
max = 0.4V for the specified output stages. For
connected.
2
C devices with input levels related to V
x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the MSSP in I
p
CONNECTION CONSIDERATIONS
FOR I
and R
SSPCON2
SSPSTAT
SSPCON
SSPBUF
SSPADD
INTCON
Name
PIR1
PIE1
PIR2
PIE2
REGISTERS ASSOCIATED WITH I
2
s
C BUS
in Figure 9-31 depends on the fol-
2
SAMPLE DEVICE CONFIGURATION FOR I
C bus devices, the values of
WCOL
LVDIE
GCEN
LVDIF
Bit 7
SMP
GIE
SDA
SCL
ACKSTAT
SSPOV
PEIE
ADIF
ADIE
Bit 6
CKE
Synchronous Serial Port Receive Buffer/Transmit Register
Rp
Synchronous Serial Port (I
SSPEN
ACKDT
DD
Bit 5
T0IE
Advance Information
D/A
Rp
must have one common supply line to which the pull-up resistor is also
ACKEN
Bit 4
INTE
CKP
P
Rs
V
2
DD
2
DEVICE
SSPM3
C Mode) Address Register
C OPERATION
SSPIF
SSPIE
BCLIE
BCLIF
RCEN
RBIE
Bit 3
Rs
+ 10%
S
example, with a supply voltage of V
V
1.7 k
The desired noise margin of 0.1V
limits the maximum value of R
optional and used to improve ESD susceptibility.
The bus capacitance is the total capacitance of wire,
connections, and pins. This capacitance limits the max-
imum value of R
(Figure 9-31).
The SMP bit is the slew rate control enabled bit. This bit
is in the SSPSTAT register, and controls the slew rate
of the I/O pins when in I
OL
PIC16C717/770/771
CCP1IE
max = 0.4V at 3 mA, R
CCP1IF
SSPM2
Bit 2
T0IF
PEN
R/W
V
2
DD
C BUS
as a function of R
TMR2IF
TMR2IE
SSPM1
RSEN
INTF
Bit 1
UA
p
due to the specified rise time
TMR1IE
TMR1IF
CCP2IF
CCP2IE
SSPM0
2
RBIF
Bit 0
C mode (master or slave).
SEN
BF
Cb=10 pF to 400 pF
2
p
p min
C mode.
is shown in Figure 9-31.
s
0000 000x
-0-- 0000
-0-- 0000
0--- 0--0
0--- 0--0
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
POR, BOR
. Series resistors are
DD
= (5.5-0.4)/0.003 =
DD
DS41120B-page 99
for the low level
= 5V+10% and
MCLR, WDT
0000 000u
-0-- 0000
-0-- 0000
0--- 0--0
0--- 0--0
uuuu uuuu
0000 0000
0000 0000
0000 0000
0000 0000

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