PIC18LF13K22-I/ML Microchip Technology, PIC18LF13K22-I/ML Datasheet - Page 279

IC PIC MCU FLASH 256KX8 20-QFN

PIC18LF13K22-I/ML

Manufacturer Part Number
PIC18LF13K22-I/ML
Description
IC PIC MCU FLASH 256KX8 20-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18LF13K22-I/ML

Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, MSSP, SPI, USART
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
18
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF13K22-I/ML
Manufacturer:
CAVIUM
Quantity:
155
FIGURE 23-1:
 2010 Microchip Technology Inc.
Byte-oriented file register operations
Byte to Byte move operations (2-word)
Bit-oriented file register operations
Literal operations
CALL, GOTO and Branch operations
Control operations
15
15
15
15
15
15
15
15
15
15
15
OPCODE
OPCODE b (BIT #) a
OPCODE
OPCODE
GENERAL FORMAT FOR INSTRUCTIONS
k = 8-bit immediate value
n = 20-bit immediate value
1111
b = 3-bit position of bit in file register (f)
a = 0 to force Access Bank
a = 1 for BSR to select bank
f = 8-bit file register address
d = 0 for result destination to be WREG register
d = 1 for result destination to be file register (f)
a = 0 to force Access Bank
a = 1 for BSR to select bank
f = 12-bit file register address
f = 8-bit file register address
1111
OPCODE
OPCODE
1111
OPCODE
12 11
12 11
12 11
OPCODE
S = Fast bit
12 11
10
12 11
11 10
d
9
9 8 7
8
8 7
f (Destination FILE #)
n<10:0> (literal)
a
f (Source FILE #)
8 7
8 7
7
8 7
S
n<7:0> (literal)
n<19:8> (literal)
n<19:8> (literal)
f (FILE #)
n<7:0> (literal)
k (literal)
n<7:0> (literal)
f (FILE #)
Preliminary
PIC18F1XK22/LF1XK22
0
0
0
0
0
0
0
0
0
0
0
MOVFF MYREG1, MYREG2
MOVLW 7Fh
BSF MYREG, bit, B
BRA MYFUNC
BC MYFUNC
GOTO Label
CALL MYFUNC
ADDWF MYREG, W, B
Example Instruction
DS41365D-page 279

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