PIC18LF13K22-I/ML Microchip Technology, PIC18LF13K22-I/ML Datasheet - Page 73

• Manufacturer Part Number: PIC18LF13K22-I/ML
• Description: IC PIC MCU FLASH 256KX8 20-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF13K22-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, MSSP, SPI, USART
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 7-7:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
OSCFIE
R/W-0
OSCFIE: Oscillator Fail Interrupt Enable bit
1 = Enabled
0 = Disabled
C1IE: Comparator C1 Interrupt Enable bit
1 = Enabled
0 = Disabled
C2IE: Comparator C2 Interrupt Enable bit
1 = Enabled
0 = Disabled
EEIE: Data EEPROM/Flash Write Operation Interrupt Enable bit
1 = Enabled
0 = Disabled
BCLIE: Bus Collision Interrupt Enable bit
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
TMR3IE: TMR3 Overflow Interrupt Enable bit
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
R/W-0
C1IE
PIE2: PERIPHERAL INTERRUPT ENABLE (FLAG) REGISTER 2
W = Writable bit
‘1’ = Bit is set
R/W-0
C2IE
R/W-0
EEIE
Preliminary
PIC18F1XK22/LF1XK22
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
BCLIE
U-0
—
x = Bit is unknown
TMR3IE
R/W-0
DS41365D-page 73
U-0
—
bit 0