ATMEGA32U2-MUR Atmel, ATMEGA32U2-MUR Datasheet - Page 52

• Manufacturer Part Number: ATMEGA32U2-MUR
• Description: MCU AVR 32K FLASH 16MHZ 32VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32U2-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -

7799D–AVR–11/10
when the counter reaches a given time-out value. The WDT gives an interrupt or a system reset
when the counter reaches two times the given time-out value. In normal operation mode, it is
required that the system uses the WDR - Watchdog Timer Reset - instruction to restart the coun-
ter before the time-out value is reached. If the system doesn't restart the counter, an interrupt or
system reset will be issued.
Figure 10-8. Watchdog Timer
In Interrupt mode, the WDT gives an interrupt when the timer expires two times. This interrupt
can be used to wake the device from sleep-modes, and also as a general system timer. One
example is to limit the maximum time allowed for certain operations, giving an interrupt when the
operation has run longer than expected.
In System Reset mode, the WDT gives a reset when the timer expires two times. This is typically
used to prevent system hang-up in case of runaway code.
The third mode, Interrupt and System Reset mode, combines the other two modes by first giving
an interrupt and then switch to System Reset mode. This mode will for instance allow a safe
shutdown by saving critical parameters before a system reset.
In addition to these modes, the early warning interrupt can be enabled in order to generate an
interrupt when the WDT counter expires the first time.
The Watchdog always on (WDTON) fuse, if programmed, will force the Watchdog Timer to Sys-
tem Reset mode. With the fuse programmed the System Reset mode bit (WDE) and Interrupt
mode bit (WDIE) are locked to 1 and 0 respectively. To further ensure program security, altera-
tions to the Watchdog set-up must follow timed sequences. The sequence for clearing WDE or
changing time-out configuration is as follows:
1. In the same operation, write a logic one to the Watchdog change enable bits WDCE
2. Within the next four clock cycles, write the WDE and Watchdog prescaler bits (WDP) as
and WDE. A logic one must be written to WDE regardless of the previous value of the
WDE bit and even if it will be cleared after the operation.
desired, but with the WDCE bit cleared. This must be done in one operation.
OSCILLATOR
CLOCK
DIVIDER
128kHz
WATCHDOG
RESET
OSC/1
OSC/3
OSC/5
OSC/7
WDEWIE
WDIE
WDIF
WDE
ATmega8U2/16U2/32U2
WDP0
WDP1
WDP2
WDP3
MCU RESET
INTERRUPT
EARLY WARNING
INTERRUPT
52