ATMEGA164PA-AU Atmel, ATMEGA164PA-AU Datasheet - Page 338

• Manufacturer Part Number: ATMEGA164PA-AU
• Description: MCU AVR 16KB FLASH 20MHZ 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA164PA-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: 2-Wire/SPI/USART
• Total Internal Ram Size: 1KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: TQFP
• Package: 44TQFP
• Family Name: ATmega
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 27-16. 2-wire Serial Bus Requirements (Continued)
Notes:
8272A–AVR–01/10
Symbol
t
t
t
t
t
t
t
LOW
HIGH
SU;STA
HD;DAT
SU;DAT
SU;STO
BUF
1. In ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P, this parameter is characterized and not 100% tested.
2. Required only for fSCL > 100 kHz.
3. Cb = capacitance of one bus line in pF.
4. fCK = CPU clock frequency
5. This requirement applies to all ATmega32 Two-wire Serial Interface operation. Other devices connected to the Two-wire
6. The actual low period generated by the ATmega32 Two-wire Serial Interface is (1/fSCL - 2/fCK), thus fCK must be greater
7. The actual low period generated by the ATmega32 Two-wire Serial Interface is (1/fSCL - 2/fCK), thus the low time require-
Serial Bus need only obey the general fSCL requirement.
than 6 MHz for the low time requirement to be strictly met at fSCL = 100 kHz.
ment will not be strictly met for fSCL > 308 kHz when fCK = 8 MHz. Still, ATmega32 devices connected to the bus may
communicate at full speed (400 kHz) with other ATmega32 devices, as well as any other device with a proper tLOW accep-
tance margin.
Parameter
Low Period of the SCL Clock
High period of the SCL clock
Set-up time for a repeated START condition
Data hold time
Data setup time
Setup time for STOP condition
Bus free time between a STOP and START
condition
Figure 27-5. 2-wire Serial Bus Timing
164A/164PA/324A/324PA/644A/644PA/1284/1284P
SCL
SDA
t
SU;STA
t
HD;STA
t
t
of
LOW
f
f
SCL
SCL
f
f
f
f
f
f
f
f
f
f
f
f
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
Condition
≤ 100 kHz
> 100 kHz
t
HIGH
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
t
HD;DAT
(6)
(7)
t
LOW
t
SU;DAT
250
100
Min
4.7
1.3
4.0
0.6
4.7
0.6
4.0
0.6
4.7
1.3
0
0
t
SU;STO
t
r
3.45
Max
0.9
–
–
–
–
–
–
–
–
–
–
–
–
t
BUF
Units
µs
µs
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
338