PIC16LC62B-04/SS Microchip Technology, PIC16LC62B-04/SS Datasheet
PIC16LC62B-04/SS
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PIC16LC62B-04/SS Summary of contents
Page 1
... Wide operating voltage range: 2.5V to 5.5V • High Sink/Source Current 25/25 mA • Commercial, Industrial and Extended temperature ranges • Low-power consumption: - < 5V, 4 MHz - 22.5 A typical @ 3V, 32 kHz - < typical standby current 1999 Microchip Technology Inc. PIC16C62B/72A Pin Diagram SDIP, SOIC, SSOP, Windowed CERDIP MCLR/V • RA0/AN0 ...
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... DS35008B-page 2 RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0/INT RC7 RC6 RC5/SDO RC4/SDI/SDA PIC16C62B MHz POR, BOR (PWRT, OST) 2K 128 7 Ports A,B SSP — Preliminary PIC16C72A MHz POR, BOR (PWRT, OST) 2K 128 8 Ports A,B SSP 5 input channels 1999 Microchip Technology Inc. ...
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... However, we realize that we may have missed a few things. If you find any information that is missing or appears in error, please: • Fill out and mail in the reader response form in the back of this data sheet. • E-mail us at webmaster@microchip.com. We appreciate your assistance in making this a better document. 1999 Microchip Technology Inc. PIC16C62B/72A To Our Valued Customers Preliminary DS35008B-page 3 ...
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... PIC16C62B/72A NOTES: DS35008B-page 4 Preliminary 1999 Microchip Technology Inc. ...
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... Synchronous CCP1 Serial Port Note 1: Higher order bits are from the STATUS register. 2: The A/D module is not available on the PIC16C62B. 1999 Microchip Technology Inc. PIC16C62B/72A ommended reading for a better understanding of the device architecture and operation of the peripheral modules. There are two devices (PIC16C62B, PIC16C72A) cov- ered by this datasheet ...
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... RC5 can also be the SPI Data Out (SPI mode). I — Ground reference for logic and I/O pins. P — Positive supply for logic and I/O pins. I/O = input/output P = power or program TTL = TTL input ST = Schmitt Trigger input Preliminary 2 C modes. 1999 Microchip Technology Inc. ...
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... Each device has words of pro- gram memory. Accessing a location above 07FFh will cause a wraparound. The reset vector is at 0000h and the interrupt vector is at 0004h. 1999 Microchip Technology Inc. PIC16C62B/72A FIGURE 2-1: PROGRAM MEMORY MAP AND STACK PC<12:0> ...
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... SSPADD 93h SSPSTAT 94h 95h — 96h — 97h — 98h — 99h — 9Ah — 9Bh — 9Ch — 9Dh — 9Eh — (2) ADCON1 9Fh A0h General Purpose Registers BFh — C0h — — FFh Bank 1 1999 Microchip Technology Inc. ...
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... The IRP and RP1 bits are reserved. Always maintain these bits clear any device reset, these pins are configured as inputs. 7: This is the value that will be in the port output latch. 1999 Microchip Technology Inc. PIC16C62B/72A The Special Function Registers can be classified into two sets ...
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... INTF RBIF 0000 000x 0000 000u TMR2IE TMR1IE -0-- 0000 -0-- 0000 — — POR BOR ---- --qq ---- --uu — — 1111 1111 1111 1111 0000 0000 0000 0000 UA BF 0000 0000 0000 0000 — — PCFG1 PCFG0 ---- -000 ---- -000 1999 Microchip Technology Inc. ...
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... Note: For borrow, the polarity is reversed. A subtraction is executed by adding the two’s complement of the second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the source register. 1999 Microchip Technology Inc. PIC16C62B/72A It is recommended, therefore, that only BCF, BSF, ...
Page 12
... DS35008B-page 12 Note: To achieve a 1:1 prescaler assignment for the TMR0 register, assign the prescaler to the Watchdog Timer. R/W-1 R/W-1 R/W-1 R/W-1 PSA PS2 PS1 PS0 128 Preliminary R = Readable bit W = Writable bit bit0 - n = Value at POR reset 1999 Microchip Technology Inc. ...
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... RBIF: RB Port Change Interrupt Flag bit least one of the RB7:RB4 input pins have changed state (clear by reading PORTB None of the RB7:RB4 input pins have changed state 1999 Microchip Technology Inc. PIC16C62B/72A Note: Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...
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... Note 1: The PIC16C62B does not have an A/D module. This bit location is reserved on these devices. Always maintain this bit clear. DS35008B-page 14 Note: Bit PEIE (INTCON<6>) must be set to enable any peripheral interrupt. R/W-0 R/W-0 R/W-0 R/W-0 SSPIE CCP1IE TMR2IE TMR1IE bit0 Preliminary R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset 1999 Microchip Technology Inc. ...
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... TMR1 register overflowed (must be cleared in software TMR1 register did not overflow Note 1: The PIC16C62B does not have an A/D module. This bit location is reserved on these devices. Always maintain this bit clear. 1999 Microchip Technology Inc. PIC16C62B/72A Note: Interrupt flag bits are set when an interrupt ...
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... If BOR is cleared while POR remains set, a Brown-out reset has occurred. If the BODEN bit is clear, the BOR bit may be ignored. U-0 U-0 R/W-0 R/W-q — — POR BOR bit0 Preliminary R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset 1999 Microchip Technology Inc. ...
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... After the stack has been PUSHed eight times, the ninth push overwrites the value that was stored from the first push. The tenth push overwrites the second push (and so on). 1999 Microchip Technology Inc. PIC16C62B/72A 2.4 Program Memory Paging The CALL and GOTO instructions provide 11 bits of address to allow branching within any 2K program memory page ...
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... Bank 1 Bank 2 Bank 3 Preliminary HOW TO CLEAR RAM USING INDIRECT ADDRESSING 0x20 ;initialize pointer FSR ; to RAM INDF ;clear INDF register FSR ;inc pointer FSR,4 ;all done? NEXT ;NO, clear next ;YES, continue Indirect Addressing 7 0 FSR register location select 1999 Microchip Technology Inc. ...
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... The TRISA register controls the direction of the RA pins, even when they are being used as analog inputs. The user must ensure the bits in the TRISA register are maintained set when using them as analog inputs. 1999 Microchip Technology Inc. PIC16C62B/72A FIGURE 3-1: Data ...
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... RA5 RA4 RA3 RA2 RA1 — PORTA Data Direction Register — — — — PCFG2 PCFG1 Preliminary (1) Value on Value on all Bit 0 POR, other resets BOR RA0 --0x 0000 --0u 0000 RA0 --xx xxxx --uu uuuu --11 1111 --11 1111 PCFG0 ---- -000 ---- -000 1999 Microchip Technology Inc. ...
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... Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). 1999 Microchip Technology Inc. PIC16C62B/72A Four of PORTB’s pins, RB7:RB4, have an interrupt on change feature. Only pins configured as inputs can cause this interrupt to occur (i.e. any RB7:RB4 pin con- figured as an output is excluded from the interrupt on change comparison) ...
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... Bit 4 Bit 3 Bit 2 Bit 1 RB5 RB4 RB3 RB2 RB1 T0CS T0SE PSA PS2 PS1 Preliminary Value on: Value on all Bit 0 POR, other resets BOR RB0 xxxx xxxx uuuu uuuu 1111 1111 1111 1111 PS0 1111 1111 1111 1111 1999 Microchip Technology Inc. ...
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... Schmitt RD TRIS Trigger Peripheral ( PORT Peripheral input Note 1: I/O pins have diode protection Port/Peripheral select signal selects between port data and peripheral output. 3: Peripheral OE (output enable) is only activated if peripheral select is active. 1999 Microchip Technology Inc. PIC16C62B/72A I/O (1) pin and Preliminary DS35008B-page 23 ...
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... Legend unknown unchanged. DS35008B-page 24 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 RC5 RC4 RC3 RC2 RC1 Preliminary TRISC Override Yes Yes mode Value on: Value on all Bit 0 POR, other resets BOR RC0 xxxx xxxx uuuu uuuu 1111 1111 1111 1111 1999 Microchip Technology Inc. ...
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... T0SE T0CS Note 1: T0CS, T0SE, PSA, PS2:PS0 (OPTION_REG<5:0>). 2: The prescaler is shared with Watchdog Timer (refer to Figure 4-2 for detailed block diagram). 1999 Microchip Technology Inc. PIC16C62B/72A Additional information on external clock requirements is available in the Electrical Specifications section of this manual, and in the PICmicro™ Mid-Range Refer- ence Manual, (DS33023) ...
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... PORTA Data Direction Register Preliminary Data Bus 8 TMR0 reg Set flag bit T0IF on Overflow Value on: Value on all Bit 0 POR, other resets BOR xxxx xxxx uuuu uuuu RBIF 0000 000x 0000 000u PS0 1111 1111 1111 1111 --11 1111 --11 1111 1999 Microchip Technology Inc. ...
Page 27
... External clock from pin RC0/T1OSO/T1CKI (on the rising edge Internal clock (F /4) OSC bit 0: TMR1ON: Timer1 On bit 1 = Enables Timer1 0 = Stops Timer1 1999 Microchip Technology Inc. PIC16C62B/72A 5.1 Timer1 Operation Timer1 can operate in one of these modes: • timer • synchronous counter • asynchronous counter The operating mode is determined by the clock select bit, TMR1CS (T1CON< ...
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... Note 1: When the T1OSCEN bit is cleared, the inverter and feedback resistor are turned off. This eliminates power drain. DS35008B-page 28 0 TMR1L 1 TMR1ON T1SYNC on/off 1 Prescaler T1OSCEN F /4 OSC Enable Internal 0 (1) Oscillator Clock 2 T1CKPS1:T1CKPS0 TMR1CS Preliminary Synchronized clock input Synchronize det SLEEP input 1999 Microchip Technology Inc. ...
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... T1CON — — Legend unknown unchanged unimplemented read as '0'. Shaded cells are not used by the Timer1 module. 1999 Microchip Technology Inc. PIC16C62B/72A 5.3 Timer1 Interrupt The TMR1 Register pair (TMR1H:TMR1L) increments from 0000h to FFFFh and rolls over to 0000h. The TMR1 Interrupt, if enabled, is generated on overflow and is latched in interrupt flag bit TMR1IF (PIR1< ...
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... PIC16C62B/72A NOTES: DS35008B-page 30 Preliminary 1999 Microchip Technology Inc. ...
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... TMR2ON: Timer2 On bit 1 = Timer2 Timer2 is off bit 1-0: T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits 00 = Prescaler Prescaler Prescaler is 16 1999 Microchip Technology Inc. PIC16C62B/72A Additional information on timer modules is available in the PICmicro™ (DS33023). FIGURE 6-1: TIMER2 BLOCK DIAGRAM Sets flag TMR2 ...
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... SSPIE CCP1IE TMR2IE Preliminary Value on Value on Bit 1 Bit 0 POR, all other BOR resets 0000 000x 0000 000u INTF RBIF -00- 0000 0000 0000 TMR1IF -0-- 0000 0000 0000 TMR1IE 0000 0000 0000 0000 1111 1111 1111 1111 1999 Microchip Technology Inc. ...
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... Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is unaffected) 1011 = Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1 and starts an A/D conversion (if A/D module is enabled)) 11xx = PWM mode 1999 Microchip Technology Inc. PIC16C62B/72A Additional information on the CCP module is available in the PICmicro™ Mid-Range Reference Manual, (DS33023) ...
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... EXAMPLE 7-1: CLRF CCP1CON MOVLW NEW_CAPT_PS MOVWF CCP1CON CCPR1L TMR1L Preliminary CHANGING BETWEEN CAPTURE PRESCALERS ;Turn CCP module off ;Load the W reg with ; the new prescaler ; mode value and CCP ON ;Load CCP1CON with this ; value 1999 Microchip Technology Inc. ...
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... CCP1X Legend unknown unchanged unimplemented read as ’0’. Shaded cells are not used by Capture and Timer1. 1999 Microchip Technology Inc. PIC16C62B/72A 7.2.1 CCP PIN CONFIGURATION The user must configure the RC2/CCP1 pin as an out- put by clearing the TRISC<2> bit. ...
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... PWM period, the CCP1 pin will not be cleared. For an example PWM period and on-time calculation, see the PICmicro™ Mid-Range Reference Manual, (DS33023). Preliminary • OSC (TMR2 prescale value) is represented by Tosc • (TMR2 prescale value) Fosc log ( ) Fpwm = bits log(2) 1999 Microchip Technology Inc. ...
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... CCPR1H Capture/Compare/PWM register1 (MSB) 17h CCP1CON — — Legend unknown unchanged unimplemented read as '0'. Shaded cells are not used by PWM and Timer2. 1999 Microchip Technology Inc. PIC16C62B/72A 1.22 kHz 4.88 kHz 19.53 kHz 78.12 kHz 156.3 kHz 208.3 kHz 0xFF 0xFF ...
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... PIC16C62B/72A NOTES: DS35008B-page 38 Preliminary 1999 Microchip Technology Inc. ...
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... To enable the serial port, SSP Enable bit, SSPEN (SSPCON<5>) must be set. To reset or reconfigure SPI mode, clear bit SSPEN, re-initialize the SSPCON reg- 1999 Microchip Technology Inc. PIC16C62B/72A ister, and then set bit SSPEN. This configures the SDI, SDO, SCK and SS pins as serial port pins. For the pins ...
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... PORTA Data Direction Register Preliminary Value on Value on Bit 0 POR, all other BOR resets RBIF 0000 000x 0000 000u xxxx xxxx uuuu uuuu SSPM0 0000 0000 0000 0000 BF 0000 0000 0000 0000 --11 1111 --11 1111 1111 1111 1111 1111 1999 Microchip Technology Inc. ...
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... SSP Status Register (SSPSTAT) • Serial Receive/Transmit Buffer (SSPBUF) • SSP Shift Register (SSPSR) - Not accessible • SSP Address Register (SSPADD) 1999 Microchip Technology Inc. PIC16C62B/72A The SSPCON register allows control of the I tion. Four mode selection bits (SSPCON<3:0>) allow one of the following I 2 • ...
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... Receive first (high) byte of Address (bits SSPIF and BF are set). 9. Read the SSPBUF register (clears bit BF) and clear flag bit SSPIF. Generate ACK SSPBUF Pulse Yes Yes Yes No Preliminary Set bit SSPIF (SSP Interrupt occurs if enabled) Yes Yes Yes Yes 1999 Microchip Technology Inc. ...
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... SCL S SSPIF (PIR1<3>) BF (SSPSTAT<0>) SSPOV (SSPCON<6>) 1999 Microchip Technology Inc. PIC16C62B/72A When the address byte overflow condition exists, then no acknowledge (ACK) pulse is given. An overflow con- dition is defined as either bit BF (SSPSTAT<0>) is set or bit SSPOV (SSPCON<6>) is set. An SSP interrupt is generated for each data transfer byte. Flag bit SSPIF (PIR1< ...
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... SCL held low while CPU responds to SSPIF cleared in software SSPBUF is written in software Set bit after writing to SSPBUF (the SSPBUF must be written-to before the CKP bit can be set) Preliminary Transmitting Data ACK From SSP interrupt service routine 1999 Microchip Technology Inc. ...
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... Legend unknown unchanged unimplemented locations read as '0'. Shaded cells are not used by SSP module in SPI mode. 2 Note 1: Maintain these bits clear mode. 1999 Microchip Technology Inc. PIC16C62B/72A 8.3.3 MULTI-MASTER OPERATION In multi-master operation, the interrupt generation on the detection of the START and STOP conditions allows the determination of when the bus is free ...
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... Receive not complete, SSPBUF is empty 2 Transmit (I C mode only Transmit in progress, SSPBUF is full 0 = Transmit complete, SSPBUF is empty DS35008B-page 46 R-0 R-0 R-0 R mode only mode only) Preliminary R = Readable bit W = Writable bit bit0 U = Unimplemented bit, read as ‘0’ =Value at POR reset 1999 Microchip Technology Inc. ...
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... C firmware controlled master operation (slave idle) 2 1110 = I C slave mode, 7-bit address with start and stop bit interrupts enabled 2 1111 = I C slave mode, 10-bit address with start and stop bit interrupts enabled 1999 Microchip Technology Inc. PIC16C62B/72A R/W-0 R/W-0 R/W-0 R/W-0 SSPM3 ...
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... PIC16C62B/72A NOTES: DS35008B-page 48 Preliminary 1999 Microchip Technology Inc. ...
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... Unimplemented: Read as '0' bit 0: ADON: A/D On bit 1 = A/D converter module is operating 0 = A/D converter module is shutoff and consumes no operating current 1999 Microchip Technology Inc. PIC16C62B/72A Additional information on the A/D module is available in the PICmicro™ (DS33023). The A/D module has three registers. These registers are: • ...
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... A = Analog input D = Digital I/O DS35008B-page 50 U-0 R/W-0 R/W-0 R/W-0 — PCFG2 PCFG1 PCFG0 RA1 RA2 RA5 RA3 V REF RA3 REF RA3 REF RA3 REF Preliminary R = Readable bit W = Writable bit bit0 U = Unimplemented bit, read as ‘0’ Value at POR reset 1999 Microchip Technology Inc. ...
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... FIGURE 9-1: A/D BLOCK DIAGRAM A/D Converter V REF (Reference voltage) 1999 Microchip Technology Inc. PIC16C62B/72A 1. Configure the A/D module: • Configure analog pins / voltage reference / and digital I/O (ADCON1) • Select A/D input channel (ADCON0) • Select A/D conversion clock (ADCON0) • ...
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... DD In general; Assuming R S Vdd Temp (122 F) T 13.0 Sec ACQ By increasing V can be substantially reduced Sampling Switch leakage V = 0.6V T ± 500 In(1/511) S Preliminary , see ACQ = 10k = 3. 10k SS and reducing R and Temp ACQ SS C HOLD = DAC capacitance = 51 1999 Microchip Technology Inc. ...
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... For faster conversion times, the selection of another clock source is recommended. 4: When device frequency is greater than 1 MHz, the RC A/D conversion clock source is recommended for sleep operation only. 5: For extended voltage devices (LC), please refer to Electrical Specifications section. 1999 Microchip Technology Inc. PIC16C62B/72A 9.3 Configuring Analog Port Pins ...
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... RA3 RA2 RA1 Preliminary Value on Value on all Bit 0 POR, other Resets BOR RBIF 0000 000x 0000 000u -0-- 0000 -0-- 0000 xxxx xxxx uuuu uuuu — ADON 0000 00-0 0000 00-0 PCFG0 ---- -000 ---- -000 --0x 0000 --0u 0000 RA0 --11 1111 --11 1111 1999 Microchip Technology Inc. ...
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... Note 1: Enabling Brown-out Reset automatically enables Power-up Timer (PWRT), regardless of the value of bit PWRTE. All of the CP1:CP0 pairs must be given the same value to enable the code protection scheme listed. 1999 Microchip Technology Inc. PIC16C62B/72A other is the Power-up Timer (PWRT), which provides a fixed delay on power-up only and is designed to keep the part in reset while the power supply stabilizes ...
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... MHz MHz MHz 15-33 pF 15- MHz 15-33 pF 15-33 pF Crystals Used Epson C-001R32.768K-A ± 20 PPM STD XTL 200.000KHz ± 20 PPM ECS ECS-10-13-1 ± 50 PPM ECS ECS-40-20-1 ± 50 PPM EPSON CA-301 8.000M-C ± 30 PPM EPSON CA-301 20.000M-C ± 30 PPM 1999 Microchip Technology Inc. ...
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... V SS OSC2/CLKOUT Fosc/4 Recommended values Rext 100 k Cext > 20pF 1999 Microchip Technology Inc. PIC16C62B/72A 10.3 Reset The PIC16CXXX differentiates between various kinds of reset: • Power-on Reset (POR) • MCLR reset during normal operation • MCLR reset during SLEEP • WDT Reset (during normal operation) • ...
Page 58
... Power-on Reset V DD Brown-out Reset BODEN OST/PWRT OST 10-bit Ripple counter OSC1 (1) PWRT On-chip 10-bit Ripple counter RC OSC Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin. DS35008B-page 58 Enable PWRT Enable OST Preliminary 1999 Microchip Technology Inc. S Chip_Reset R Q ...
Page 59
... R1 = 100 will limit any current flowing into MCLR from external capacitor C in the event of MCLR/V PP down due to Electrostatic Discharge (ESD) or Electrical Overstress (EOS). 1999 Microchip Technology Inc. PIC16C62B/72A 10.5 Power-up Timer (PWRT) The Power-up Timer provides a fixed nominal time-out (T , parameter #33) from the POR. The Power-up PWRT Timer operates on an internal RC oscillator ...
Page 60
... Program STATUS Counter Register 000h 0001 1xxx 000h 000u uuuu 000h 0001 0uuu 000h 0000 1uuu uuu0 0uuu 000h 0001 1uuu ( uuu1 0uuu Preliminary Wake-up from SLEEP 1024T OSC OSC — PCON Register ---- --0x ---- --uu ---- --uu ---- --uu ---- --uu ---- --u0 ---- --uu 1999 Microchip Technology Inc. ...
Page 61
... When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: See Table 10-5 for reset value for specific condition any device reset, these pins are configured as inputs. 5: This is the value that will be in the port output latch. 1999 Microchip Technology Inc. PIC16C62B/72A Power-on Reset, MCLR Resets ...
Page 62
... The latency is the same for one or two cycle instructions. Individual interrupt flag bits are set regardless of the status of their corresponding mask bit or the GIE bit Wake-up (If in SLEEP mode) T0IF T0IE INTF INTE RBIF RBIE PEIE GIE Preliminary 1999 Microchip Technology Inc. Interrupt to CPU ...
Page 63
... SWAPF W_TEMP,F ;Swap W_TEMP SWAPF W_TEMP,W ;Swap W_TEMP into W 1999 Microchip Technology Inc. PIC16C62B/72A 10.11 Context Saving During Interrupts During an interrupt, only the return PC value is saved on the stack. Typically, users may wish to save key reg- isters during an interrupt, (i.e., W register and STATUS register) ...
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... Postscaler MUX PSA 0 1 MUX WDT Time-out Bit 6 Bit 5 Bit 4 Bit 3 CP1 CP0 BODEN PWRTE INTEDG T0CS T0SE PSA Preliminary , parameter #31) is WDT PS2:PS0 To TMR0 (Figure 4-2) PSA Bit 2 Bit 1 Bit 0 WDTE FOSC1 FOSC0 PS2 PS1 PS0 1999 Microchip Technology Inc. ...
Page 65
... When the SLEEP instruction is being executed, the next instruction ( pre-fetched. For the device to wake-up through an interrupt event, the corresponding interrupt enable bit must be set (enabled). Wake-up is 1999 Microchip Technology Inc. PIC16C62B/72A regardless of the state of the GIE bit. If the GIE bit is clear (disabled), the device resumes execution at the instruction after the SLEEP instruction ...
Page 66
... For complete details of serial programming, please refer to the In-Circuit Serial Programming (ICSP™) Guide, DS30277. DS35008B-page (2) OST Interrupt Latency (Note 2) Processor in SLEEP PC+2 PC Inst( Dummy cycle Inst( ™ Preliminary 0004h 0005h Inst(0004h) Inst(0005h) Dummy cycle Inst(0004h) 1999 Microchip Technology Inc. ...
Page 67
... NOP. One instruc- tion cycle consists of four oscillator periods. Thus, for an oscillator frequency of 4 MHz, the normal instruction 1999 Microchip Technology Inc. PIC16C62B/72A execution time conditional test is true or the program counter is changed as a result of an instruc- tion, the instruction execution time ...
Page 68
... Preliminary 1999 Microchip Technology Inc. Status Notes Affected LSb C,DC,Z 1,2 ffff Z 1,2 ffff Z 2 ffff Z 0011 Z 1,2 ffff Z 1,2 ffff 1,2,3 ffff Z ...
Page 69
... Operation: (W) .AND. (k) (W) Status Affected: Z Description: The contents of W register are AND’ed with the eight bit literal 'k'. The result is placed in the W register 1999 Microchip Technology Inc. PIC16C62B/72A ANDWF AND W with f Syntax: [ label ] ANDWF Operands Operation: (W) .AND. (f) Status Affected: ...
Page 70
... None 00h ( register is cleared. Zero bit (Z) is set. Clear Watchdog Timer [ label ] CLRWDT None 00h WDT 0 WDT prescaler TO, PD CLRWDT instruction resets the Watch- dog Timer. It also resets the prescaler of the WDT. Status bits TO and PD are set. 1999 Microchip Technology Inc. ...
Page 71
... If ’d’ the result is placed in the W register. If ’d’ the result is placed back in register ’f’. If the result is 1, the next instruction, is executed. If the result is 0, then a NOP is executed instead making instruction. 1999 Microchip Technology Inc. PIC16C62B/72A GOTO Unconditional Branch Syntax: [ label ] Operands: ...
Page 72
... Syntax: Operands Operation: (W) Status Affected: None Description: Move data from W register to register . 'f' NOP No Operation Syntax: [ label ] Operands: None Operation: No operation Status Affected: None Description: No operation. Preliminary MOVLW k 255 (W) . The don’t cares will assem- MOVWF f 127 (f) NOP 1999 Microchip Technology Inc. ...
Page 73
... Operation: TOS PC Status Affected: None Description: Return from subroutine. The stack is POPed and the top of the stack (TOS) is loaded into the program counter. This is a two cycle instruction. 1999 Microchip Technology Inc. PIC16C62B/72A RLF Rotate Left f through Carry Syntax: [ label ] Operands ...
Page 74
... Exclusive OR W with f Syntax: [ label ] Operands 127 d [0,1] Operation: (W) .XOR. (f) Status Affected: Z Description: Exclusive OR the contents of the W register with register 'f the result is stored in the W register the result is stored back in regis- ter 'f'. Preliminary 1999 Microchip Technology Inc. XORLW k 255 W) XORWF f,d destination) ...
Page 75
... A full featured editor • A project manager • Customizable tool bar and key mapping • A status bar • On-line help 1999 Microchip Technology Inc. PIC16C62B/72A MPLAB allows you to: • Edit your source files (either assembly or ‘C’) • One touch assemble (or compile) and download ...
Page 76
... PICmicro MCU. 12.7 PICMASTER/PICMASTER CE The PICMASTER system from Microchip Technology is a full-featured, professional quality emulator system. This flexible in-circuit emulator provides a high-quality, universal platform for emulating Microchip 8-bit PICmicro microcontrollers (MCUs). PICMASTER sys- tems are sold worldwide, with a CE compliant model available for European Union (EU) countries ...
Page 77
... SIMICE is an entry-level hardware development sys- tem designed to operate in a PC-based environment with Microchip’s simulator MPLAB-SIM. Both SIMICE and MPLAB-SIM run under Microchip Technology’s MPLAB Integrated Development Environment (IDE) software. Specifically, SIMICE provides hardware sim- ulation for Microchip’s PIC12C5XX, PIC12CE5XX, and PIC16C5X families of PICmicro 8-bit microcontrollers ...
Page 78
... Programming Tools K L evaluation and programming tools support EE OQ Microchips HCS Secure Data Products. The HCS eval- uation kit includes an LCD display to show changing codes, a decoder to decode transmissions, and a pro- gramming interface to program test transmitters. DS35008B-page 78 PIC17C756, Preliminary 1999 Microchip Technology Inc. ...
Page 79
... PIC16C5X á á á á PIC14000 á á á á á PIC12CXXX Tools Software Emulators 1999 Microchip Technology Inc. PIC16C62B/72A á á á á á á á á á á á á á á á á á ...
Page 80
... PIC16C62B/72A NOTES: DS35008B-page 80 Preliminary 1999 Microchip Technology Inc. ...
Page 81
... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 1998 Microchip Technology Inc. PIC16C62B/72A (except V , MCLR, and RA4) ...
Page 82
... PIC16C62B/72A FIGURE 13-1: PIC16C62B/72A-20 VOLTAGE-FREQUENCY GRAPH 6.0 V 5.5 V 5.0 V 4.5 V 4.0 V 3.5 V 3.0 V 2.5 V 2.0 V FIGURE 13-2: PIC16LC62B/72A AND PIC16C62B/72A/JW VOLTAGE-FREQUENCY GRAPH 6.0 V 5.5 V 5.0 V 4.5 V 4.0 V PIC16LCXXX-04 3.5 V 3.0 V 2 MHz F = (12.0 MHz/V) (V MAX Note the minimum voltage of the PICmicro DDAPPMIN Fmax is no greater than 10 MHz ...
Page 83
... FIGURE 13-3: PIC16C62B/72A-04 VOLTAGE-FREQUENCY GRAPH 6.0 V 5.5 V 5.0 V 4.5 V 4.0 V 3.5 V 3.0 V 2 MHz 1998 Microchip Technology Inc. PIC16C62B/72A PIC16CXXX-04 Frequency Preliminary DS35008B-page 83 ...
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... BOR Preliminary +70°C for commercial +85°C for industrial +125°C for extended Conditions = 4 MHz 5.5V (Note MHz 5. 4.0V, WDT enabled,- + 4.0V, WDT disabled + 4.0V, WDT disabled,- + 4.0V, WDT disabled,- +125 4.0V BIT SET and 1998 Microchip Technology Inc. ...
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... DC Characteristics: PIC16LC62B/72A-04 (Commercial, Industrial) DC CHARACTERISTICS Param Sym Characteristic No. D001 V Supply Voltage DD D002* V RAM Data Retention DR Voltage (Note 1) D003 V V Start Voltage to POR DD ensure internal Power-on Reset signal D004 Rise Rate to VDD DD D004A* ensure internal Power-on Reset signal D005 V Brown-out Reset ...
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... PIC16C62B/72A 13.3 DC Characteristics: PIC16C62B/72A-04 (Commercial, Industrial, Extended) PIC16C62B/72A-20 (Commercial, Industrial, Extended) PIC16LC62B/72A-04 (Commercial, Industrial) DC CHARACTERISTICS Param Sym Characteristic No. Input Low Voltage V I/O ports IL D030 with TTL buffer D030A D031 with Schmitt Trigger buffer D032 MCLR, OSC1 (in RC mode) D033 OSC1 (in XT, HS and LP ...
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... RC mode. 2: The leakage current on the MCLR/V levels represent normal operating conditions. Higher leakage current may be measured at different input volt- ages. 3: Negative current is defined as current sourced by the pin. 1998 Microchip Technology Inc. PIC16C62B/72A Standard Operating Conditions (unless otherwise stated) Operating temperature 0°C ...
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... BUF Bus free specifications only Hold ST DAT DATA input hold STA START condition DS35008B-page specifications only specifications only) T Time osc OSC1 SCK T0CKI t1 T1CKI Period R Rise V Valid Z Hi-impedance High High Low Low SU Setup STO STOP condition Preliminary 1998 Microchip Technology Inc. ...
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... Standard Operating Conditions (unless otherwise stated) Operating temperature Operating voltage V LC parts operate for commercial/industrial temp’s only. FIGURE 13-4: LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS Load condition 1 V Pin 1998 Microchip Technology Inc. PIC16C62B/72A 0°C T +70°C for commercial A -40°C T +85° ...
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... RC and XT osc modes ns HS osc mode (-04 osc mode (-20 osc mode ns RC osc mode ns XT osc mode ns HS osc mode (-04 osc mode (-20 osc mode 4/F CY OSC ns XT oscillator s LP oscillator ns HS oscillator ns XT oscillator ns LP oscillator ns HS oscillator 1998 Microchip Technology Inc. ...
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... Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. ††These parameters are asynchronous events not related to any internal clock edge. Note 1: Measurements are taken in RC Mode where CLKOUT output 1998 Microchip Technology Inc. PIC16C62B/72A Q1 Q2 ...
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... Max Units 2 — — — 1024 — — OSC 28 72 132 ms V — — 2.1 s 100 — — Preliminary 34 Conditions = 5V, -40°C to +125° 5V, -40°C to +125° OSC1 period OSC = 5V, -40°C to +125° (D005) DD VDD 1998 Microchip Technology Inc. ...
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... Delay from external clock edge to timer increment * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 1998 Microchip Technology Inc. PIC16C62B/72A 41 40 ...
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... Min Typ† Max Units 0. — CY PIC16CXX 10 — PIC16LCXX 20 — 0. — CY PIC16CXX 10 — PIC16LCXX 20 — — PIC16CXX — 10 PIC16LCXX — 25 PIC16CXX — 10 PIC16LCXX — 25 Preliminary Conditions — ns — ns — ns — ns — ns — ns — prescale value (1, 1998 Microchip Technology Inc. ...
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... SCK edge † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Specification 73A is only required if specifications 71A and 72A are used. 1998 Microchip Technology Inc. PIC16C62B/72A 72 78 ...
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... PIC16CXX — PIC16LCXX — — PIC16CXX PIC16LCXX T CY Preliminary 79 78 Typ† Max Units Conditions — — ns — — ns Note 1 — — ns — — ns Note 1 — — ns — — ns Note 1 — — — — 100 ns — — ns 1998 Microchip Technology Inc. ...
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... SCK edge TscL2ssH † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Specification 73A is only required if specifications 71A and 72A are used. 1998 Microchip Technology Inc. PIC16C62B/72A ...
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... PIC16CXX PIC16LCXX — 1. Preliminary 83 77 Typ† Max Units Conditions — — ns — — ns — — ns Note 1 — — ns — — ns Note 1 — — ns Note 1 — — — — — 100 ns — — 100 ns — — ns 1998 Microchip Technology Inc. ...
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... T : STOP condition SU STO Setup time T : STOP condition 93 HD STO Hold time * These parameters are characterized but not tested. 1998 Microchip Technology Inc. PIC16C62B/72A Min Ty Max Unit p s 100 kHz mode 4700 — — ns 400 kHz mode 600 — — 100 kHz mode 4000 — ...
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... Cb is specified to be from 10-400 specified to be from 10-400 pF s Only relevant for repeated START condition s s After this period the first clock pulse is generated Note Note Time the bus must be free before a new transmission s can start pF R 1998 Microchip Technology Inc. ...
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... The power-down current spec includes any such leakage from the A/D module current is from RA3 pin or V REF 3: The A/D conversion result never decreases with an increase in the Input Voltage and has no missing codes. 1998 Microchip Technology Inc. PIC16C62B/72A Min Typ† — ...
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... LSb (i.e., 20 5.12V) from the last sam- pled voltage (as stated HOLD — If the A/D clock source is selected as RC, a time added before the A/D clock starts. This allows the SLEEP instruction to be executed 1998 Microchip Technology Inc. ...
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... Graphs and Tables not available at this time. Data is not available at this time but you may reference the PIC16C72 Series Data Sheet (DS39016,) DC and AC char- acteristic section, which contains data similar to what is expected. 1999 Microchip Technology Inc. PIC16C62B/72A is standard deviation, over the whole temperature range. ...
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... PIC16C62B/72A NOTES: DS35008B-page 104 Preliminary 1999 Microchip Technology Inc. ...
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... Standard OTP marking consists of Microchip part number, year code, week code, facility code, mask rev#, and assembly code. For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 1999 Microchip Technology Inc. PIC16C62B/72A Example ...
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... Preliminary MILLIMETERS NOM MAX 28 2.54 3.56 3.81 4.06 3.18 3.30 3.43 0.38 7.62 7.94 8.26 7.09 7.80 8.51 34.16 34.67 35.18 3.18 3.30 3.43 0.20 0.29 0.38 1.02 1.33 1.65 0.41 0.48 0.56 8.13 8.89 10. 1999 Microchip Technology Inc. ...
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... Ceramic Pkg. Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Window Width Window Length *Controlling Parameter JEDEC Equivalent: MO-058 Drawing No. C04-080 1999 Microchip Technology Inc. PIC16C62B/72A Units INCHES* MIN NOM MAX MIN ...
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... B .014 .017 .020 Preliminary A2 MILLIMETERS NOM MAX 28 1.27 2.36 2.50 2.64 2.24 2.31 2.39 0.10 0.20 0.30 10.01 10.34 10.67 7.32 7.49 7.59 17.65 17.87 18.08 0.25 0.50 0.74 0.41 0.84 1. 0.23 0.28 0.33 0.36 0.42 0. 1999 Microchip Technology Inc. ...
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... Mold Draft Angle Top Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-150 Drawing No. C04-073 1999 Microchip Technology Inc. PIC16C62B/72A Units ...
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... PIC16C62B/72A NOTES: DS35008B-page 110 Preliminary 1999 Microchip Technology Inc. ...
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... Basic SSP (2 mode SPI) CCP module CCP does not reset TMR1 when in special event trigger mode. Timer1 module Writing to TMR1L register can cause over- flow in TMR1H register. 1999 Microchip Technology Inc. PIC16C62B/72A Revision Description PIC16C62A/72 2.5V - 5.5V SSP (4 mode SPI) N/A ...
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... Eliminate any data memory page switching. Redefine data variables to reallocate them. 4. Verify all writes to STATUS, OPTION, and FSR registers since these have changed. 5. Change reset vector to 0000h. Preliminary 1999 Microchip Technology Inc. , MCLR/V , RB6 (clock) PP dips below a fixed set- ...
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... Interaction of Two CCP Modules ............................... 33 Capture/Compare/PWM (CCP) ......................................... 33 CCP1CON Register .............................................. 9 CCPR1H Register ................................................ 9 CCPR1L Register ................................................. 9 Enable (CCP1IE Bit) .................................................. 14 Flag (CCP1IF Bit) ...................................................... 15 RC2/CCP1 Pin ............................................................. 6 Timer Resources ....................................................... 33 Timing Diagram ......................................................... 94 1999 Microchip Technology Inc. PIC16C62B/72A CCP1CON Register .......................................................... 33 CCP1M3:CCP1M0 Bits ............................................. 33 CCP1X:CCP1Y Bits .................................................. 33 Code Protection ...........................................................55 CP1:CP0 Bits ............................................................ 55 , Compare (CCP Module) .................................................... 35 51 Block Diagram ...
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... PICDEM-1 Low-Cost PICmicro Demo Board .................... PICDEM-2 Low-Cost PIC16CXX Demo Board ................. PICDEM-3 Low-Cost PIC16CXXX Demo Board ............... 77 PICSTART Plus Entry Level Development System ........ PIE1 Register ..............................................................10 ADIE Bit ..................................................................... 14 CCP1IE Bit ................................................................ 14 SSPIE Bit ................................................................... 14 TMR1IE Bit ................................................................ TMR2IE Bit ................................................................ 14 Pinout Descriptions , 63 PIC16C62B/PIC16C72A ............................................. 6 Preliminary 1999 Microchip Technology Inc ...
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... Timing Diagram ......................................................... 92 Prescaler, Capture ............................................................. 34 Prescaler, Timer0 .............................................................. 25 Assignment (PSA Bit) ......................................... 12 Block Diagram ........................................................... 26 Rate Select (PS2:PS0 Bits) ................................ 12 Switching Between Timer0 and WDT ........................ 26 Prescaler, Timer1 .............................................................. 28 Select (T1CKPS1:T1CKPS0 Bits)............................... 27 1999 Microchip Technology Inc. PIC16C62B/72A , Prescaler, Timer2 .............................................................. 36 15 Select (T2CKPS1:T2CKPS0 Bits) ............................. 31 PRO MATE II Universal Programmer ............................. 77 Program Counter PCL Register ...
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... Watchdog Timer (WDT) ............................................ Register ......................................................................... 63 Wake-up from SLEEP .................................................55 Interrupts .............................................................60 MCLR Reset .............................................................. 61 Timing Diagram ......................................................... 66 WDT Reset ................................................................ Watchdog Timer (WDT) .............................................. Block Diagram ........................................................... 64 Enable (WDTE Bit) .............................................. Programming Considerations .................................... Oscillator ............................................................. 64 Timing Diagram ......................................................... 92 WDT Reset, Normal Operation .................... 57 WDT Reset, SLEEP ..................................... 57 WWW, On-Line Support ...................................................... 3 Preliminary , 1999 Microchip Technology Inc. ...
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... Trademarks: The Microchip name, logo, PIC, PICmicro, PICSTART, PICMASTER and PRO MATE are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Flex ROM, MPLAB and fuzzy- LAB are trademarks and SQTP is a service mark of Micro- chip in the U ...
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... Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? 8. How would you improve our software, systems, and silicon products? DS35008B-page 118 Total Pages Sent FAX: (______) _________ - _________ N Literature Number: DS35008B Preliminary 1998 Microchip Technology Inc. ...
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... +125 MHz MHz MHz PIC16C62B: range 4. PIC16C62BT: V range 4.0V to 5.5V (Tape/Reel) DD PIC16LC62B: range 2. PIC16LC62BT: range 2.5V to 5.5V (Tape/Reel Preliminary Examples a) PIC16C72A-04/P 301 Commercial Temp., PDIP Package, 4 MHz, normal V limits, QTP DD pattern #301 b) DS35008B-page 119 ...
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... Information contained in this publication regarding device applications and the like is intended for suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip ...