PIC24FJ128GA106-E/MR Microchip Technology, PIC24FJ128GA106-E/MR Datasheet - Page 289

• Manufacturer Part Number: PIC24FJ128GA106-E/MR
• Description: IC PIC MCU FLASH 128K 64-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GA106-E/MR

• Program Memory Type: FLASH
• Program Memory Size: 128KB (43K x 24)
• Package / Case: 64-VFQFN, Exposed Pad
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 28-8:
FIGURE 28-9:
TABLE 28-22: AC SPECIFICATIONS
 2010 Microchip Technology Inc.
T
T
T
T
T
T
T
T
Symbol
CTS
SETUP
STDELAY
LW
HW
BLD
BHD
WAK
BRGx
Cycle
Clock
UxRX
BCLKx High Time
BCLKx Low Time
BCLKx Falling Edge Delay from UxTX
BCLKx Rising Edge Delay from UxTX
Min. Low on UxRX Line to Cause Wake-up
Min. Low on UxCTS Line to Start
Transmission
Start bit Falling Edge to System Clock Rising
Edge Setup Time
Maximum Delay in the Detection of the
Start bit Falling Edge
BAUD RATE GENERATOR OUTPUT TIMING
START BIT EDGE DETECTION
Characteristics
BCLKx
UxTX
T
BLD
PIC24FJ256GA110 FAMILY
T
BRGx + 1 * T
CY
Any Value
T
T
CY
BHD
T
STDELAY
Min
T
-50
/2 – 50
CY
20
20
—
—
CY
3
T
LW
(T
CY
Start bit Detected, BRGx Started
T
T
HW
SETUP
* BRGx) + T
T
Typ
CY
—
—
—
—
—
1
/2
CY
/2
T
CY
T
CY
DS39905E-page 289
+ T
Max
/2 + 50
50
—
—
—
—
—
SETUP
Units
ns
ns
ns
ns
s
ns
ns
ns