DSPIC33FJ64GP710-I/PT Microchip Technology, DSPIC33FJ64GP710-I/PT Datasheet - Page 309

• Manufacturer Part Number: DSPIC33FJ64GP710-I/PT
• Description: IC DSPIC MCU/DSP 64K 100TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP710-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: DCI, ECAN, I2C, SPI, UART
• No. Of I/o's: 85
• Flash Memory Size: 64KB
• Supply Voltage Range: 3V To 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164333 - MODULE SKT FOR PM3 100QFPDM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

APPENDIX A:
Revision A (October 2006)
Initial release of this document.
Revision B (March 2008)
This revision includes minor typographical and
formatting changes throughout the data sheet text.
The major changes are referenced by their respective
section in the following table.
TABLE A-1:
© 2009 Microchip Technology Inc.
Section 1.0 “Device Overview”
Section 3.0 “Memory Organization”
Section 5.0 “Reset”
Section 7.0 “Direct Memory Access (DMA)” Updated the table cross-reference in Note 2 in the DMAxREQ
Section Name
MAJOR SECTION UPDATES
REVISION HISTORY
dsPIC33FJXXXGPX06/X08/X10
Added External Interrupt pin information (INT0 through INT4) to
Table 1-1.
Updated Change Notification Register Map table title to reflect
application with dsPIC33FJXXXMCX10 devices (Table 3-2).
Added Change Notification Register Map tables (Table 3-3 and
Table 3-4) for dsPIC33FJXXXMCX08 and dsPIC33FJXXXMCX06
devices, respectively.
Updated the bit range for AD1CON3 (ADCS<7:0>) in the ADC1
Register Map and added Note 1 (Table 3-15).
Updated the bit range for AD2CON3 (ADCS<7:0>) in the ADC2
Register Map (Table 3-16).
Updated the Reset value for C1FEN1 (FFFF) in the ECAN1 Register
Map When C1CTRL1.WIN = 0 or 1 (Table 3-18) and updated the
title to reflect applicable devices.
Updated the title in the ECAN1 Register Map When C1CTRL1.WIN
= 0 to reflect applicable devices (Table 3-19).
Updated the title in the ECAN1 Register Map When C1CTRL1.WIN
= 1 to reflect applicable devices (Table 3-20).
Updated the Reset value for C2FEN1 (FFFF) in the ECAN2 Register
Map When C2CTRL1.WIN = 0 or 1 (Table 3-21) and updated the
title to reflect applicable devices.
Updated the title for the ECAN2 Register Map When C2CTRL1.WIN
= 0 to reflect applicable devices (Table 3-22).
Updated the title for the ECAN2 Register Map When C2CTRL1.WIN
= 1 to reflect applicable devices (Table 3-23).
Updated Reset value for TRISA (C6FF) and changed the bit 12 and
bit 13 values for ODCA to unimplemented in the PORTA Register
Map (Table 3-25).
Changed the bit 10 and bit 9 values for PMD1 to unimplemented in
the PMD Register Map (Table 3-34).
Added POR and BOR references in Reset Flag Bit Operation
(Table 5-1).
register (Register 7-2).
Update Description
DS70286C-page 307