ATMEGA325P-20MU Atmel, ATMEGA325P-20MU Datasheet - Page 151

• Manufacturer Part Number: ATMEGA325P-20MU
• Description: IC MCU AVR 32K FLASH 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA325P-20MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, UART, USI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATMEGA325P-16MU; ATMEGA325P-16MU

16.10.2
16.10.3
16.10.4
8023F–AVR–07/09
TCNT2 – Timer/Counter Register
OCR2A – Output Compare Register A
ASSR – Asynchronous Status Register
• Bit 2:0 – CS22:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
16-6.
Table 16-6.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the compare
match on the following timer clock. Modifying the counter (TCNT2) while the counter is running,
introduces a risk of missing a compare match between TCNT2 and the OCR2A Register.
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC2A pin.
Bit
(0xB2)
Read/Write
Initial Value
Bit
(0xB3)
Read/Write
Initial Value
Bit
(0xB6)
Read/Write
Initial Value
CS22
0
0
0
0
1
1
1
1
Clock Select Bit Description
R
R/W
R/W
7
–
0
7
0
7
0
CS21
0
0
1
1
0
0
1
1
R
6
–
0
R/W
R/W
6
0
6
0
CS20
R
5
–
0
R/W
R/W
0
1
0
1
0
1
0
1
5
0
5
0
EXCLK
R/W
4
0
R/W
R/W
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
clk
clk
4
0
4
0
OCR2A[7:0]
TCNT2[7:0]
T2S
T2S
T2S
T2S
T2S
T
T
2
2
S
S
/256 (From prescaler)
/1024 (From prescaler)
/(No prescaling)
/8 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
AS2
R/W
3
0
R/W
R/W
3
0
3
0
TCN2UB
ATmega325P/3250P
R
2
0
R/W
R/W
2
0
2
0
OCR2UB
R
1
0
R/W
R/W
1
0
1
0
TCR2UB
R/W
R/W
R
0
0
0
0
0
0
OCR2A
TCNT2
ASSR
Table
151