PIC24FJ128GB206-I/PT Microchip Technology, PIC24FJ128GB206-I/PT Datasheet - Page 273

• Manufacturer Part Number: PIC24FJ128GB206-I/PT
• Description: MCU PIC 16BIT FLASH USB 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GB206-I/PT

• Core Size: 16-Bit
• Program Memory Size: 128KB (43K x 24)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 52
• Ram Memory Size: 96KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: I2C, SPI, UART, USB
• Embedded Interface Type: I2C, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 19-3:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10-9
bit bit 8
bit 7
bit 6-0
Note 1:
PTWREN
R/W-0
U-0
—
Not available on 64-pin devices (PIC24FJXXXGB206).
PTWREN: Write/Enable Strobe Port Enable bit
1 = PMWR/PMENB port is enabled
0 = PMWR/PMENB port is disabled
PTRDEN: Read/Write Strobe Port Enable bit
1 = PMRD/PMWR port is enabled
0 = PMRD/PMWR port is disabled
PTBE1EN: High Nibble/Byte Enable Port Enable bit
1 = PMBE1 port is enabled
0 = PMBE1 port is disabled
PTBE0EN: Low Nibble/Byte Enable Port Enable bit
1 = PMBE0 port is enabled
0 = PMBE0 port is disabled
Unimplemented: Read as ‘0’
AWAITM<1:0>: Address Latch Strobe Wait States bits
11 = Wait of 3½ T
10 = Wait of 2½ T
01 = Wait of 1½ T
00 = Wait of ½ T
AWAITE: Address Hold After Address Latch Strobe Wait States bits
1 = Wait of 1¼ T
0 = Wait of ¼ T
Unimplemented: Read as ‘0’
PTEN<22:16>: EPMP Address Port Enable bits
1 = PMA<22:16> function as EPMP address lines
0 = PMA<22:16> function as port I/Os
PTEN22
PTRDEN
R/W-0
R/W-0
PMCON3: EPMP CONTROL REGISTER 3
(1)
W = Writable bit
‘1’ = Bit is set
CY
PTEN21
PTBE1EN
CY
CY
R/W-0
R/W-0
CY
CY
CY
(1)
PTEN20
PTBE0EN
PIC24FJ256GB210 FAMILY
R/W-0
R/W-0
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PTEN19
R/W-0
(1)
U-0
—
(1)
PTEN18
AWAITM1
R/W-0
R/W-0
(1)
x = Bit is unknown
PTEN17
AWAITM0
R/W-0
R/W-0
(1)
DS39975A-page 273
PTEN16
AWAITE
R/W-0
R/W-0
bit 8
bit 0
(1)