PIC24FJ128GB206-I/PT Microchip Technology, PIC24FJ128GB206-I/PT Datasheet - Page 330

• Manufacturer Part Number: PIC24FJ128GB206-I/PT
• Description: MCU PIC 16BIT FLASH USB 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GB206-I/PT

• Core Size: 16-Bit
• Program Memory Size: 128KB (43K x 24)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 52
• Ram Memory Size: 96KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: I2C, SPI, UART, USB
• Embedded Interface Type: I2C, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC24FJ256GB210 FAMILY
26.2
All PIC24FJ256GB210 family devices power their core
digital logic at a nominal 1.8V. This may create an issue
for designs that are required to operate at a higher
typical voltage, such as 3.3V. To simplify system
design, all devices in the PIC24FJ256GB210 family
incorporate an on-chip regulator that allows the device
to run its core logic from V
The regulator is controlled by the ENVREG pin. Tying V
to the pin enables the regulator, which in turn, provides
power to the core from the other V
ulator is enabled, a low-ESR capacitor (such as ceramic)
must be connected to the V
helps to maintain the stability of the regulator. The recom-
mended value for the filter capacitor (C
Section 29.1 “DC Characteristics”.
26.2.1
When the on-chip regulator is enabled, it provides a
constant voltage of 1.8V nominal to the digital core
logic.
The regulator can provide this level from a V
2.1V, all the way up to the device’s V
have the capability to boost V
vent “brown-out” conditions when the voltage drops too
low for the regulator, the Brown-out Reset occurs. Then
the regulator output follows V
drop of 300 mV.
To provide information about when the regulator
voltage starts reducing, the on-chip regulator includes
a simple Low-Voltage Detect circuit, which sets the
Low-Voltage Detect Interrupt Flag, LVDIF (IFS4<8>).
This can be used to generate an interrupt to trigger an
orderly shutdown.
FIGURE 26-1:
DS39975A-page 330
Note 1:
Regulator Enabled (ENVREG tied to V
(10 F typ)
On-Chip Voltage Regulator
C
EFC
VOLTAGE REGULATOR
LOW-VOLTAGE DETECTION
This is a typical operating voltage. Refer to
Section 29.1 “DC Characteristics” for
the full operating ranges of V
3.3V
(1)
CONNECTIONS FOR THE
ON-CHIP REGULATOR
V
ENVREG
V
V
PIC24FJXXXGB2XX
DD
CAP
SS
DD
CAP
.
DD
DD
DD
pin (Figure 26-1). This
levels. In order to pre-
with a typical voltage
pins. When the reg-
DDMAX
EFC
DD
) is provided in
.
. It does not
DD
DD
):
of about
DD
26.2.2
When the voltage regulator is enabled, it takes approx-
imately 10 s for it to generate output. During this time,
designated as T
T
operation after any power-down, including Sleep mode.
T
(RCON<8>) and the WUTSEL Configuration bits
(CW3<11:10>). Refer to Section 29.0 “Electrical
Characteristics” for more information on T
26.2.3
When
PIC24FJ256GB210 family devices also have a simple
brown-out capability. If the voltage supplied to the reg-
ulator is inadequate to maintain the output level, the
regulator Reset circuitry will generate a Brown-out
Reset. This event is captured by the BOR (RCON<1>)
flag bit. The brown-out voltage specifications are
provided in Section 7. “Reset” (DS39712) in the
“PIC24F Family Reference Manual”.
26.2.4
When enabled, the on-chip regulator always consumes
a small incremental amount of current over I
including when the device is in Sleep mode, even
though the core digital logic does not require power. To
provide additional savings in applications where power
resources are critical, the regulator can be made to
enter Standby mode on its own whenever the device
goes into Sleep mode. This feature is controlled by the
VREGS bit (RCON<8>). Clearing the VREGS bit
enables the Standby mode. When waking up from
Standby mode, the regulator needs to wait for T
expire before wake-up.
The regulator wake-up time required for Standby
mode
(CW3<11:10>) Configuration bits. The regulator
wake-up time is lower when WUTSEL<1:0> = 01, and
higher when WUTSEL<1:0> = 11. Refer to the T
specification in Table 29-10 for regulator wake-up
time.
When the regulator’s Standby mode is turned off
(VREGS = 1), the device wakes up without waiting for
TV
consumption while in Sleep mode will be approximately
40 A higher than what it would be if the regulator was
allowed to enter Standby mode.
VREG
VREG
Note:
REG
. However, with the VREGS bit set, the power
is determined by the status of the VREGS bit
is applied every time the device resumes
is
the
ON-CHIP REGULATOR AND POR
ON-CHIP REGULATOR AND BOR
For more information, see Section 29.0
“Electrical Characteristics”. The infor-
mation in this data sheet supersedes the
information in the FRM.
VOLTAGE REGULATOR STANDBY
MODE
controlled
on-chip
VREG
, code execution is disabled.
 2010 Microchip Technology Inc.
by
regulator
the
WUTSEL<1:0>
is
VREG
enabled,
VREG
DD
.
VREG
/I
PD
to
,