AT89C51ED2-SMSUM Atmel, AT89C51ED2-SMSUM Datasheet - Page 78

IC 8051 MCU FLASH 64K 68PLCC

AT89C51ED2-SMSUM

Manufacturer Part Number
AT89C51ED2-SMSUM
Description
IC 8051 MCU FLASH 64K 68PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51ED2-SMSUM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
EUART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
48
Number Of Timers
3 bit
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51ED2-SMSUM
Manufacturer:
ATMEL
Quantity:
678
Part Number:
AT89C51ED2-SMSUM
Manufacturer:
Atmel
Quantity:
10 000
78
AT89C51RD2/ED2
Table 17-7.
IPL1 - Interrupt Priority Register (B2h)
Reset Value = XXXX X000b
Bit addressable
Number
Bit
7
7
6
5
4
3
2
1
0
-
Mnemonic
IPL1 Register
KBDL
SPIL
Bit
6
-
-
-
-
-
-
-
Description
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
SPI interrupt Priority bit
Refer to SPIH for priority level.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Keyboard interrupt Priority bit
Refer to KBDH for priority level.
5
-
4
-
3
-
SPIL
2
TWIL
1
4235K–8051–05/08
KBDL
0

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