PIC17LC752-08I/L Microchip Technology, PIC17LC752-08I/L Datasheet - Page 221

IC MCU OTP 8KX16 A/D 68PLCC

PIC17LC752-08I/L

Manufacturer Part Number
PIC17LC752-08I/L
Description
IC MCU OTP 8KX16 A/D 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets

Specifications of PIC17LC752-08I/L

Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
16KB (8K x 16)
Program Memory Type
OTP
Ram Size
678 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
Processor Series
PIC17LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
678 B
Interface Type
I2C, MSSP, RS- 232, SCI, SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
50
Number Of Timers
8
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000, DM173001
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17LC752-08I/L
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
PIC17LC752-08I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
2000 Microchip Technology Inc.
After Interrupt
operation
Decode
PC
GLINTD =
Q1
No
=
operation
operation
Return from Interrupt
[ label ]
None
TOS
0
PCLATH is unchanged.
GLINTD
Return from Interrupt. Stack is POP’ed
and Top-of-Stack (TOS) is loaded in the
PC. Interrupts are enabled by clearing
the GLINTD bit. GLINTD is the global
interrupt disable bit (CPUSTA<4>).
1
2
RETFIE
0000
Q2
No
No
TOS
0
GLINTD;
(PC);
RETFIE
0000
operation
GLINTD
Clear
Q3
No
0000
from stack
operation
POP PC
Q4
No
0101
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
operation
Decode
WREG
WREG
Q1
No
=
=
operation
Return Literal to WREG
[ label ]
0
k
PCLATH is unchanged
None
WREG is loaded with the eight-bit literal
'k'. The program counter is loaded from
the top of the stack (the return address).
The high address latch (PCLATH)
remains unchanged.
1
2
TABLE
literal 'k'
Read
1011
Q2
No
CALL TABLE ; WREG contains table
:
ADDWF PC
RETLW k0
RETLW k1
:
:
RETLW kn
0x07
value of k7
k
(WREG); TOS
PIC17C7XX
255
RETLW k
0110
operation
Process
;
;
;
; WREG = offset
; Begin table
;
; End of table
Data
Q3
No
DS30289B-page 221
offset value
WREG now has
table value
kkkk
(PC);
from stack,
operation
POP PC
Write to
WREG
Q4
No
kkkk

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