PIC16CE624/JW Microchip Technology, PIC16CE624/JW Datasheet - Page 55

IC MCU EPROM1KX14 EE COMP 18CDIP

PIC16CE624/JW

Manufacturer Part Number
PIC16CE624/JW
Description
IC MCU EPROM1KX14 EE COMP 18CDIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet

Specifications of PIC16CE624/JW

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
EPROM, UV
Eeprom Size
128 x 8
Ram Size
96 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-CDIP (0.300", 7.62mm) Window
For Use With
DVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Connectivity
-
10.4.5
On power-up, the time-out sequence is as follows: First
PWRT time-out is invoked after POR has expired, then
OST is activated. The total time-out will vary based on
oscillator configuration and PWRTE bit status. For
example, in RC mode with PWRTE bit erased (PWRT
disabled), there will be no time-out at all. Figure 10-8,
Figure 10-9
sequences.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(see Figure 10-9). This is useful for testing purposes or
to synchronize more than one PICmicro
ating in parallel.
Table 10-5 shows the reset conditions for some special
registers, while Table 10-6 shows the reset conditions
for all the registers.
TABLE 10-3:
TABLE 10-4:
Legend: x = unknown, u = unchanged
1999 Microchip Technology Inc.
Oscillator Configuration
POR
0
0
0
1
1
1
1
1
TIME-OUT SEQUENCE
XT, HS, LP
RC
BOR
and
X
X
X
0
1
1
1
1
TIME-OUT IN VARIOUS SITUATIONS
STATUS/PCON BITS AND THEIR SIGNIFICANCE
Figure 10-10
TO
1
0
X
X
0
0
u
1
72 ms + 1024 T
PWRTE = 0
PD
depict
1
X
0
X
u
0
u
0
72 ms
®
device oper-
Power-on-reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR reset during normal operation
MCLR reset during SLEEP
time-out
OSC
Power-up
PWRTE = 1
1024 T
10.4.6
The power control/status register, PCON (address
8Eh) has two bits.
Bit0 is BOR (Brown-out). BOR is unknown on
power-on-reset. It must then be set by the user and
checked on subsequent resets to see if BOR = 0
indicating that a brown-out has occurred. The BOR
status bit is a don’t care and is not necessarily
predictable if the brown-out circuit is disabled (by
setting BODEN bit = 0 in the Configuration word).
Bit1 is POR (Power-on-reset). It is a ‘0’ on
power-on-reset and unaffected otherwise. The user
must write a ‘1’ to this bit following a power-on-reset.
On a subsequent reset, if POR is ‘0’, it will indicate that
a power-on-reset must have occurred (V
gone too low).
OSC
POWER CONTROL (PCON)/STATUS
REGISTER
72 ms + 1024 T
Brown-out Reset
PIC16CE62X
72 ms
OSC
DS40182C-page 55
from SLEEP
1024 T
DD
Wake-up
may have
OSC

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