Z8F012ASB020SG Zilog, Z8F012ASB020SG Datasheet - Page 49

IC ENCORE XP MCU FLASH 1K 8SOIC

Z8F012ASB020SG

Manufacturer Part Number
Z8F012ASB020SG
Description
IC ENCORE XP MCU FLASH 1K 8SOIC
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F012ASB020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
6
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Eeprom Size
16 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
Z8F012Ax
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4039
Z8F012ASB020SG
Architecture
GPIO Alternate Functions
PS022825-0908
System
DATA
Clock
Bus
Data Register
Port Output
Figure 7
ability to accommodate alternate functions and variable port current drive strength is not
displayed.
Many of the GPIO port pins can be used for general-purpose I/O and access to on-chip
peripheral functions such as the timers and serial communication devices. The Port A–D
Alternate Function sub-registers configure these pins for either General-Purpose I/O or
alternate function operation. When a pin is configured for alternate function, control of the
port pin direction (input/output) is passed from the Port A–D Data Direction registers to
the alternate function assigned to this pin.
possible with each port pin. For those pins with more one alternate function, the alternate
function is defined through Alternate Function Sets sub-registers AFS1 and AFS2.
The crystal oscillator functionality is not controlled by the GPIO block. When the crystal
oscillator is enabled in the oscillator control block, the GPIO functionality of PA0 and PA1
is overridden. In that case, those pins function as input and output for the crystal oscillator.
D
Q
displays a simplified block diagram of a GPIO port pin. In this figure, the
Figure 7. GPIO Port Pin Block Diagram
System
Clock
Port Output Control
Port Data Direction
Data Register
Port Input
Q
D
Table 14
on page 41 lists the alternate functions
Q
Z8 Encore! XP
D
General-Purpose Input/Output
Schmitt-Trigger
Product Specification
GND
VDD
®
F082A Series
Port
Pin
38

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