M38039GCHSP#U0 Renesas Electronics America, M38039GCHSP#U0 Datasheet - Page 13

• Manufacturer Part Number: M38039GCHSP#U0
• Description: IC 740/3803 MCU QZROM 64DIP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38039GCHSP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 16.8MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: QzROM
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3803 Group (Spec.H QzROM version)
REJ03B0166-0113 Rev.1.13
Page 11 of 100
FUNCTIONAL DESCRIPTION
CENTRAL PROCESSING UNIT (CPU)
The 3803 group (Spec.H QzROM version) uses the standard 740
Family instruction set. Refer to the table of 740 Family
addressing modes and machine instructions or the 740 Family
Software Manual for details on the instruction set.
Machine-resident 740 Family instructions are as follows:
[Accumulator (A)]
The accumulator is an 8-bit register. Data operations such as data
transfer, etc. are executed mainly through the accumulator.
[Index Register X (X)]
The index register X is an 8-bit register. In the index addressing
modes, the value of the OPERAND is added to the contents of
register X and specifies the real address.
[Index Register Y (Y)]
The index register Y is an 8-bit register. In partial instruction, the
value of the OPERAND is added to the contents of register Y
and specifies the real address.
Fig 7.
The FST and SLW instructions cannot be used.
The STP, WIT, MUL, and DIV instructions can be used.
740 Family CPU register structure
b15
PC
H
Aug 21, 2009
b7
b7
b7
b7
b7
b7
N
V
T
PC
B
A
X
Y
S
D
L
I
Z
b0
b0
b0
b0
b0
b0
[Stack Pointer (S)]
The stack pointer is an 8-bit register used during subroutine calls
and interrupts. This register indicates start address of stored area
(stack) for storing registers during subroutine calls and
interrupts.
The low-order 8 bits of the stack address are determined by the
contents of the stack pointer. The high-order 8 bits of the stack
address are determined by the stack page selection bit. If the
stack page selection bit is “0”, the high-order 8 bits becomes
“00
becomes “01
The operations of pushing register contents onto the stack and
popping them from the stack are shown in Figure 8.
Store registers other than those described in Figure 7 with
program when the user needs them during interrupts or
subroutine calls (see Table 4).
[Program Counter (PC)]
The program counter is a 16-bit counter consisting of two 8-bit
registers PC
next instruction to be executed.
C
16
Accumulator
Index Register X
Index Register Y
Stack Pointer
Program Counter
Processor Status Register (PS)
Carry Flag
Zero Flag
Interrupt Disable Flag
Decimal Mode Flag
Break Flag
Index X Mode Flag
Overflow Flag
Negative Flag
”. If the stack page selection bit is “1”, the high-order 8 bits
H
16
and PC
”.
L
. It is used to indicate the address of the