R5F21217JFP#U1 Renesas Electronics America, R5F21217JFP#U1 Datasheet - Page 483

• Manufacturer Part Number: R5F21217JFP#U1
• Description: MCU FLASH 48K 2.5K CMOS 48LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/21r

Specifications of R5F21217JFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.
0.20
REVISION HISTORY
Jun 28, 2006
Date
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Figure 14.70 Registers TRDSR0 to TRDSR1 in PWM Mode revised.
Table 14.29 Reset Synchronous PWM Mode Specifications revised.
Figure 14.78 TRDSTR Register in Reset Synchronous PWM Mode
revised.
Figure 14.79 Registers TRDMR and TRDFCR in Reset Synchronous
PWM Mode revised.
Figure 14.80 Registers TRDOER1 to TRDOER2 in Reset Synchronous
PWM Mode;
Figure 14.81 TRDCR0 Register in Reset Synchronous PWM Mode
revised.
Figure 14.82 Registers TRDSR0 to TRDSR1 in Reset Synchronous
PWM Mode revised.
Figure 14.88 TRDSTR Register in Complementary PWM Mode revised.
Figure 14.89 TRDMR Register in Complementary PWM Mode revised.
Figure 14.90 TRDFCR Register in Complementary PWM Mode revised.
Figure 14.91 Registers TRDOER1 to TRDOER2 in Complementary
PWM Mode;
Figure 14.92 Registers TRDCR0 to TRDCR1 in Complementary PWM
Mode revised.
Figure 14.93 Registers TRDSR0 to TRDSR1 in Complementary PWM
Mode revised.
Below the Table 14.32;
Figure 14.99 Block Diagram of PWM3 Mode;
Table 14.33 PWM3 Mode Specifications revised.
Figure 14.100 TRDSTR Register in PWM3 Mode revised.
Figure 14.101 Registers TRDMR and TRDFCR in PWM3 Mode revised.
Figure 14.102 Registers TRDOER1 to TRDOER2 in PWM3 Mode;
Figure 14.104 TRDCR0 Register in PWM3 Mode revised.
Figure 14.105 Registers TRDSR0 and TRDSR1 in PWM3 Mode added.
Figure 14.106 Registers TRDIER0 and TRDIER1 in PWM3 Mode
revised.
Table 14.34 TRDGRji Register Functions in PWM3 Mode revised.
On the 4th line from the bottom;
Figure 14.109 Operating Example of PWM3 Mode revised.
R8C/20 Group, R8C/21 Group Hardware Manual
NOTE in the TRDOER2 register added.
NOTE in the TRDOER2 register added.
“Since values ~ (buffer register).” added.
“Buffer” added.
NOTE in the TRDOER2 register added.
“Registers TRDGRC0, ~ (buffer register).” added.
C - 7
Description
Summary