C8051F041-GQR Silicon Laboratories Inc, C8051F041-GQR Datasheet - Page 270

• Manufacturer Part Number: C8051F041-GQR
• Description: IC 8051 MCU 64K FLASH 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F04xr

Specifications of C8051F041-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x8b, 13x12b; D/A 2x10b, 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: 336-1205 - DEV KIT FOR F040/F041/F042/F043
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

C8051F040/1/2/3/4/5/6/7
21.1.4. Mode 3: 9-Bit UART, Variable Baud Rate
Mode 3 uses the Mode 2 transmission protocol with the Mode 1 baud rate generation. Mode 3 operation
transmits 11 bits: a start bit, 8 data bits (LSB first), a programmable ninth data bit, and a stop bit. The baud
rate is derived from Timer 1 or Timer 2, 3, or 4 overflows, as defined by Equation 21.1 and Equation 21.3.
Multiprocessor communications and hardware address recognition are supported, as described in
Section
21.2.
21.2. Multiprocessor Communications
Modes 2 and 3 support multiprocessor communication between a master processor and one or more slave
processors by special use of the ninth data bit and the built-in UART0 address recognition hardware. When
a master processor wants to transmit to one or more slaves, it first sends an address byte to select the tar-
get(s). An address byte differs from a data byte in that its ninth bit is logic 1; in a data byte, the ninth bit is
always set to logic 0. UART0 will recognize as “valid” (i.e., capable of causing an interrupt) two types of
addresses: (1) a masked address and (2) a broadcast address at any given time. Both are described
below.
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