HD6417020SX20IV Renesas Electronics America, HD6417020SX20IV Datasheet - Page 407

SH 1 CORE 32B MPU, 20MHZ/5V, 100

HD6417020SX20IV

Manufacturer Part Number
HD6417020SX20IV
Description
SH 1 CORE 32B MPU, 20MHZ/5V, 100
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6417020SX20IV

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
3. SCI status check and receive data read: read the serial status register (SSR), check that RDRF
4. To continue receiving serial data: read RDR, and clear RDRF to 0 before the frame MSB (bit
RENESAS 390
cannot resume if ORER remains set to 1.
is set to 1, then read receive data from the receive data register (RDR) and clear RDRF to 0.
The RXI interrupt can also be used to determine if the RDRF bit has changed from 0 to 1.
7) of the current frame is received. If the DMAC is started by a receive-data-full interrupt
(RXI) to read RDR, the RDRF bit is cleared automatically so this step is unnecessary.
Figure 13.18 Sample Flowchart for Serial Receiving
No
No
and clear the SSR's RDRF bit to 0
Clear the RE bit of the SCR to 0
Read the ORER bit of the SSR
Read the RDR's receive data
Read RDRF bit of the SSR
Total count received?
Reception ends
Start receiving
Initialization
ORER = 1?
RDRF = 1?
No
Yes
Yes
Error handling
Yes
(1)
(3)
(4)
(2)

Related parts for HD6417020SX20IV