HD64F2633RTE28 Renesas Electronics America, HD64F2633RTE28 Datasheet - Page 115

IC H8S MCU FLASH 256K 120-TQFP

HD64F2633RTE28

Manufacturer Part Number
HD64F2633RTE28
Description
IC H8S MCU FLASH 256K 120-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet

Specifications of HD64F2633RTE28

Core Processor
H8S/2600
Core Size
16-Bit
Speed
28MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
73
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
2.2.26 (2)
DEC (W)
DEC (DECrement)
Operation
Rd – 1
Rd
Rd – 2
Rd
Assembly-Language Format
DEC.W #1, Rd
DEC.W #2, Rd
Operand Size
Word
Description
This instruction subtracts the immediate value 1 or 2 from the contents of a 16-bit register Rd
(destination operand) and stores the result in the 16-bit register Rd.
Available Registers
Rd: R0 to R7, E0 to E7
Operand Format and Number of States Required for Execution
Addressing
Mnemonic
Mode
Register direct
DEC.W
Register direct
DEC.W
Notes
An overflow is caused by the operations H'8000 – 1
H'8001 – 2
H'7FFF.
Condition Code
I
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
cleared to 0.
Z: Set to 1 if the result is zero; otherwise
cleared to 0.
V: Set to 1 if an overflow occurs; otherwise
cleared to 0.
C: Previous value remains unchanged.
Instruction Format
Operands
1st byte
2nd byte
#1, Rd
1
B
5
#2, Rd
1
B
D
H'7FFF, H'8000 – 2
Rev. 4.00 Feb 24, 2006 page 99 of 322
Section 2 Instruction Descriptions
Decrement
UI H
U
N
Z
V
3rd byte
4th byte
rd
rd
H'7FFE, and
REJ09B0139-0400
C
No. of
States
1
1

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