HD6473258P10V Renesas Electronics America, HD6473258P10V Datasheet - Page 229
HD6473258P10V
Manufacturer Part Number
HD6473258P10V
Description
MCU 5V 32K PB-FREE 64-DIP
Manufacturer
Renesas Electronics America
Series
H8® H8/325r
Specifications of HD6473258P10V
Core Size
8-Bit
Program Memory Size
32KB (32K x 8)
Oscillator Type
External
Core Processor
H8/300
Speed
10MHz
Connectivity
SCI, UART/USART
Number Of I /o
53
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Operating Temperature
-20°C ~ 75°C
Package / Case
64-DIP
No. Of I/o's
53
Ram Memory Size
1024Byte
Cpu Speed
10MHz
No. Of Timers
3
Digital Ic Case Style
DIP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/330
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Peripherals
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6473258P10V
Manufacturer:
RENESAS
Quantity:
600
Part Number:
HD6473258P10V
Manufacturer:
HITACHI/日立
Quantity:
20 000
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In hardware standby mode there is no additional current dissipation, regardless of the conditions
when hardware standby mode is entered.
12.5 Hardware Standby Mode
12.5.1 Transition to Hardware Standby Mode
Regardless of its current state, the chip enters the hardware standby mode whenever the STBY pin
goes low.
The hardware standby mode reduces power consumption drastically by halting the CPU, stopping
all the functions of the on-chip supporting modules, and placing I/O ports in the high-impedance
state. The registers of the on-chip supporting modules are reset to their initial values. Only the on-
chip RAM is held unchanged, provided the minimum necessary voltage supply is maintained (at
least 2V).
Notes: 1. The RAME bit in the system control register should be cleared to 0 before the STBY pin
Note that the H8/300 CPU pre-fetches instructions. If an instruction stored in the last two bytes
of on-chip ROM is executed, the contents of the next two bytes, not in on-chip ROM, will be
fetched as the next instruction.
This problem does not occur in expanded mode when on-chip ROM is disabled (mode 1).
(b) In expanded mode with on-chip ROM enabled (mode 2): when software standby mode is
2. Do not change the inputs at the mode pins (MD
entered by executing an instruction stored in on-chip ROM, after even one instruction not
stored in on-chip ROM has been fetched (e.g. from external memory or on-chip RAM).
goes low, to disable the on-chip RAM during the hardware standby mode.
Be particularly careful not to let both mode pins go low in hardware standby mode, since
that places the chip in PROM mode and increases current drain.
225
1
, MD
0
) during hardware standby mode.
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