M30624FGAFP#U3 Renesas Electronics America, M30624FGAFP#U3 Datasheet - Page 55

• Manufacturer Part Number: M30624FGAFP#U3
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30624FGAFP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Chapter 3 Functions
R0L/R0
A0/A0
dsp:8[A0]
dsp:16[A0] dsp:16[A1]
dsp:20[A0] dsp:20[A1]
R2R0
(4) Operation
(5) Function
(6) Selectable src / dest (label)
(7) Flag change
(8) Description example
(9) Related instructions
Explains the operation of the instruction using symbols.
Explains the function of the instruction and precautions to be taken when using the instruction.
If the instruction has an operand, this indicates the format you can choose for the operand.
(a) Items that can be selected as src (source).
(b) Items that can be selected as dest (destination).
(c) Addressing that can be selected.
(d) Addressing that cannot be selected.
(e) Shown on the left side of the slash (R0H) is the addressing when data is handled in bytes (8 bits).
Indicates a flag change that occurs after the instruction is executed. The symbols in the table mean the
following:
Shows a description example for the instruction.
Shows related instructions that cause an operation similar or opposite that of this instruction.
Shown on the right side of the slash (R1) is the addressing when data is handled in words (16 bits).
“
“O” The flag changes depending on condition.
—
” The flag does not change.
R0H/R1
A1/A1
dsp:8[A1]
R3R1
src
R1L/R2
[A0]
dsp:8[SB]
dsp:16[SB]
abs20
A1A0
R1H/R3
[A1]
dsp:8[FB] dsp:8[A0]
abs16
#IMM
dsp:8[SP]
37
R0L/R0
A0/A0
dsp:16[A0] dsp:16[A1] dsp:16[SB] abs16
dsp:20[A0] dsp:20[A1] abs20
R2R0
R0H/R1
A1/A1
dsp:8[A1]
R3R1
dest
R1L/R2
[A0]
dsp:8[SB]
A1A0
3.1 Guide to This Chapter
R1H/R3
[A1]
dsp:8[FB]
dsp:8[SP]
(a)
(b)
(c)
(d)
(e)