SAK-XC886CLM-8FFA 5V AC Infineon Technologies, SAK-XC886CLM-8FFA 5V AC Datasheet - Page 94

IC MCU 8BIT 32KB FLASH 48TQFP

SAK-XC886CLM-8FFA 5V AC

Manufacturer Part Number
SAK-XC886CLM-8FFA 5V AC
Description
IC MCU 8BIT 32KB FLASH 48TQFP
Manufacturer
Infineon Technologies
Series
XC8xxr
Datasheet

Specifications of SAK-XC886CLM-8FFA 5V AC

Core Processor
XC800
Core Size
8-Bit
Speed
103.2MHz
Connectivity
CAN, LIN, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.75K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-TFQFP
Data Bus Width
8 bit
Data Ram Size
1.75 KB
Interface Type
UART, SSC
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
34
Number Of Timers
4
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
The following formulas calculate the final baud rate without and with the fractional divider
respectively:
The maximum baud rate that can be generated is limited to
clock of 24 MHz, the maximum achievable baud rate is 0.75 MBaud.
Standard LIN protocol can support a maximum baud rate of 20 kHz, the baud rate
accuracy is not critical and the fractional divider can be disabled. Only the prescaler is
used for auto baud rate calculation. For LIN fast mode, which supports the baud rate of
20 kHz to 115.2 kHz, the higher baud rates require the use of the fractional divider for
greater accuracy.
Table 30
settings and deviation errors. The fractional divider is disabled and a module clock of
24 MHz is used.
Table 30
Baud rate
19.2 kBaud
9600 Baud
4800 Baud
2400 Baud
The fractional divider allows baud rates of higher accuracy (lower deviation error) to be
generated.
115.2 kHz, using different module clock frequencies. The fractional divider is enabled
(fractional divider mode) and the corresponding parameter settings are shown.
Data Sheet
lists the various commonly used baud rates with their corresponding parameter
Table 31
baud rate
Typical Baud rates for UART with Fractional Divider disabled
=
lists the resulting deviation errors from generating a baud rate of
----------------------------------------------------------------------------------- - where 2
16
×
Prescaling Factor
(2BRPRE)
1 (BRPRE=000
1 (BRPRE=000
2 (BRPRE=001
4 (BRPRE=010
baud rate
2
BRPRE
f
×
=
PCLK
(
BR_VALUE
------------------------------------------------------------------------------------
16
×
2
BRPRE
B
B
B
B
)
)
)
)
+
f
×
PCLK
1
(
87
)
BR_VALUE
Reload Value
(BR_VALUE + 1)
156 (9C
156 (9C
156 (9C
78 (4E
BRPRE
+
1
)
H
×
H
H
H
)
×
)
)
)
STEP
-------------- -
(
256
BR_VALUE
f
PCLK
Functional Description
/32. Hence, for a module
+
1
) 1
Deviation Error
0.17 %
0.17 %
0.17 %
0.17 %
>
XC886/888CLM
V1.2, 2009-07
(3.5)
(3.6)

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