SAB-C165-LF HA Infineon Technologies, SAB-C165-LF HA Datasheet - Page 5

• Manufacturer Part Number: SAB-C165-LF HA
• Description: IC MCU 16BIT TQFP-100-3
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAB-C165-LF HA

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 77
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LFQFP
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: 1xASC, 1xSSC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 77
• Number Of Timers: 5
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Packages: PG-TQFP-100
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 2.0 KByte
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: B165LFHAXP; SABC165LFHAX; SP000011595

16-Bit Single-Chip Microcontroller
C166 Family
C165
• High Performance 16-bit CPU with 4-Stage Pipeline
• 16-Priority-Level Interrupt System with 28 Sources, Sample-Rate down to 40 ns
• 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
• Clock Generation via prescaler or via direct clock input
• On-Chip Memory Modules
• On-Chip Peripheral Modules
• Up to 16 MBytes External Address Space for Code and Data
• Idle and Power Down Modes
• Programmable Watchdog Timer
• Up to 77 General Purpose I/O Lines,
• Power Supply: the C165 can operate from a 5 V or a 3 V power supply
• Supported by a Large Range of Development Tools like C-Compilers,
• On-Chip Bootstrap Loader
• 100-Pin MQFP Package (0.65 mm pitch)
• 100-Pin TQFP Package (0.5 mm pitch)
Data Sheet
– 80 ns Instruction Cycle Time at 25 MHz CPU Clock
– 400 ns Multiplication (16
– Enhanced Boolean Bit Manipulation Facilities
– Additional Instructions to Support HLL and Operating Systems
– Register-Based Design with Multiple Variable Register Banks
– Single-Cycle Context Switching Support
– 16 MBytes Total Linear Address Space for Code and Data
– 1024 Bytes On-Chip Special Function Register Area
Peripheral Event Controller (PEC)
– 2 KBytes On-Chip Internal RAM (IRAM)
– Two Multi-Functional General Purpose Timer Units with 5 Timers
– Two Serial Channels (Synchronous/Asynchronous and High-Speed-Synchronous)
– Programmable External Bus Characteristics for Different Address Ranges
– Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit
– Five Programmable Chip-Select Signals
– Hold- and Hold-Acknowledge Bus Arbitration Support
partly with Selectable Input Thresholds and Hysteresis
Macro-Assembler Packages, Emulators, Evaluation Boards, HLL-Debuggers,
Simulators, Logic Analyzer Disassemblers, Programming Boards
Data Bus Width
16 bit), 800 ns Division (32 / 16 bit)
1
V2.0, 2000-12
C165