DS5003FPM-16+ Maxim Integrated Products, DS5003FPM-16+ Datasheet - Page 23

IC MICROPROCESSOR SECURE 80-MQFP

DS5003FPM-16+

Manufacturer Part Number
DS5003FPM-16+
Description
IC MICROPROCESSOR SECURE 80-MQFP
Manufacturer
Maxim Integrated Products
Series
DS500xr
Datasheet

Specifications of DS5003FPM-16+

Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SIO, UART/USART
Peripherals
Power-Fail Reset, WDT
Number Of I /o
32
Program Memory Type
SRAM
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
80-MQFP, 80-PQFP
Processor Series
DS5003
Core
8051
Data Bus Width
8 bit
Program Memory Size
32 KB, 64 KB, 128 KB
Data Ram Size
32 KB, 64 KB, 128 KB
Interface Type
UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
2
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
The DS5003 monitors V
early warning power-fail interrupt, and switchover to
lithium backup. It uses an internal bandgap reference
in determining the switch points. These are called
V
below V
vectors to location 2Bh if the power-fail warning was
enabled. Full processor operation continues regard-
less. When power falls further to V
invokes a reset state. No further code execution is per-
formed unless power rises back above V
decoded chip enables and the R/W signal go to an
inactive (logic 1) state. V
this time. When V
circuitry switches to the lithium cell for power. The
majority of internal circuits are disabled and the remain-
ing nonvolatile states are retained. Any devices con-
Figure 14. Connection to 64kB x 8 SRAM
PFW
, V
CCMIN
PFW
, the DS5003 performs an interrupt and
LITHIUM
, and V
+3V
CC
______________________________________________________________________________________
+5V
+5V
drops further to below V
LI
, respectively. When V
Power Management
CC
13
54
14
CC
V
V
PORT 0
PORT 1
PORT 2
PORT 3
MSEL
to provide power-fail reset,
CC
LI
is still the power source at
DS5003
CCMIN
BA14–BA0
BD7–BD0
, the DS5003
V
GND
R/W
CCO
CE1
CE2
CCMIN
LI
CC
12
10
74
2
52
, internal
Secure Microprocessor Chip
drops
. All
nected to V
time. V
approximately 0.45V (less a diode drop), depending on
the load. Low-power SRAMs should be used for this
reason. When using the DS5003, the user must select
the appropriate battery to match the SRAM data-reten-
tion current and the desired backup lifetime. Note that
the lithium cell is only loaded when V
Secure Microcontroller User’s Guide has more informa-
tion on this topic. The trip points V
listed in the electrical specifications.
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE
80 MQFP
CCO
CCO
28
27
20
14
28
27
20
14
is at the lithium battery voltage minus
V
WE
CS
A14–A0
D7–D0
GND
V
WE
CS
A14–A0
D7–D0
GND
CC
CC
are powered by the lithium cell at this
PACKAGE CODE
32kB x 8 SRAM
32kB x 8 SRAM
Package Information
M80+2
OE
OE
22
22
CCMIN
DOCUMENT NO.
CC
and V
21-0271
< V
PFW
LI
. The
are
23

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