AT90S2313-10SI Atmel, AT90S2313-10SI Datasheet - Page 33

• Manufacturer Part Number: AT90S2313-10SI
• Description: MCU 2K FLASH 10MHZ 20-SOIC
• Manufacturer: Atmel
• Series: AVR® 90Sr

Specifications of AT90S2313-10SI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

Timer/Counter1 – TCNT1H
and TCNT1L
0839I–AVR–06/02
• Bits 2,1,0 – CS12, CS11, CS10: Clock Select1, Bits 2, 1 and 0
The Clock Select1 bits 2, 1, and 0 define the prescaling source of Timer/Counter1.
Table 10. Clock 1 Prescale Select
The Stop condition provides a Timer Enable/Disable function. The CK down divided
modes are scaled directly from the CK Oscillator clock. If the external pin modes are
used for Timer/Counter1, transitions on PD5/(T1) will clock the counter even if the pin is
configured as an output. This feature can give the user software control of the counting.
This 16-bit register contains the prescaled value of the 16-bit Timer/Counter1. To
ensure that both the high and low bytes are read and written simultaneously when the
CPU accesses these registers, the access is performed using an 8-bit temporary regis-
ter (TEMP). This temporary register is also used when accessing OCR1A and ICR1. If
the main program and interrupt routines perform access to registers using TEMP, inter-
rupts must be disabled during access from the main program or interrupts if interrupts
are re-enabled.
•
•
Bit
$2D ($4D)
$2C ($4C)
Read/Write
Initial value
CS12
TCNT1 Timer/Counter1 Write:
When the CPU writes to the high byte TCNT1H, the written data is placed in the
TEMP Register. Next, when the CPU writes the low byte TCNT1L, this byte of data
is combined with the byte data in the TEMP Register, and all 16 bits are written to
the TCNT1 Timer/Counter1 Register simultaneously. Consequently, the high byte
TCNT1H must be accessed first for a full 16-bit register write operation.
TCNT1 Timer/Counter1 Read:
When the CPU reads the low byte TCNT1L, the data of the low byte TCNT1L is sent
to the CPU and the data of the high byte TCNT1H is placed in the TEMP Register.
When the CPU reads the data in the high byte TCNT1H, the CPU receives the data
in the TEMP Register. Consequently, the low byte TCNT1L must be accessed first
for a full 16-bit register read operation.
0
0
0
0
1
1
1
1
MSB
R/W
R/W
CS11
15
7
0
0
0
0
1
1
0
0
1
1
R/W
R/W
14
6
0
0
CS10
0
1
0
1
0
1
0
1
R/W
R/W
13
5
0
0
Description
Stop, the Timer/Counter1 is stopped.
CK
CK/8
CK/64
CK/256
CK/1024
External Pin T1, falling edge
External Pin T1, rising edge
R/W
R/W
12
4
0
0
R/W
R/W
11
3
0
0
R/W
R/W
10
2
0
0
R/W
R/W
9
1
0
0
AT90S2313
LSB
R/W
R/W
8
0
0
0
TCNT1H
TCNT1L
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