PIC17LC756AT-08/L Microchip Technology, PIC17LC756AT-08/L Datasheet - Page 212

• Manufacturer Part Number: PIC17LC756AT-08/L
• Description: IC MCU OTP 16KX16 A/D 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17LC756AT-08/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-PLCC
• Processor Series: PIC17LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 902 B
• Interface Type: I2C, MSSP, RS- 232, SCI, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 12 bit
• Data Rom Size: 902 B
• Height: 4.06 mm
• Length: 24.33 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Width: 24.33 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC17C7XX
DCFSNZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If skip:
Example:
DS30289B-page 212
Before Instruction
After Instruction
operation
Decode
TEMP_VALUE
TEMP_VALUE
If TEMP_VALUE
If TEMP_VALUE
Q1
Q1
No
PC
PC
register ’f’
operation
Decrement f, skip if not 0
[label] DCFSNZ f,d
0
d
(f) – 1
skip if not 0
None
The contents of register ’f’ are decre-
mented. If ’d’ is 0, the result is placed in
WREG. If ’d’ is 1, the result is placed
back in register ’f’.
If the result is not 0, the next instruc-
tion, which is already fetched is dis-
carded and a NOP is executed instead,
making it a two-cycle instruction.
1
1(2)
HERE
ZERO
NZERO
Read
0010
Q2
Q2
No
f
[0,1]
255
=
=
=
=
=
(dest);
DCFSNZ
:
:
011d
operation
?
TEMP_VALUE - 1,
0;
Address (ZERO)
0;
Address (NZERO)
Process
Data
Q3
Q3
No
ffff
TEMP, 1
destination
operation
Write to
Q4
Q4
No
ffff
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
After Instruction
operation
Decode
PC =
Q1
No
Address (THERE)
Read literal
operation
Unconditional Branch
[ label ]
0
k
k<12:8>
PC
None
GOTO allows an unconditional branch
anywhere within an 8K page boundary.
The thirteen-bit immediate value is
loaded into PC bits <12:0>. Then the
upper eight bits of PC are loaded into
PCLATH. GOTO is always a two-cycle
instruction.
1
2
GOTO THERE
110k
Q2
No
’k’
k
PC<12:0>;
2000 Microchip Technology Inc.
:13>
8191
GOTO k
kkkk
PCLATH<4:0>,
operation
Process
PCLATH<7:5>
Data
Q3
No
kkkk
Write to PC
operation
Q4
No
kkkk