ATMEGA163-8AI Atmel, ATMEGA163-8AI Datasheet - Page 137

• Manufacturer Part Number: ATMEGA163-8AI
• Description: IC AVR MCU 16K A/D 8MHZ 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA163-8AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Perform a Page Write
Consideration while Updating
the Boot Loader Section
Wait for SPM Instruction to
Complete
Instruction Word Read after
Page Erase, Page Write, and
Lock Bit Write
Avoid Reading the Application
Section During Self-
Programming
Boot Loader Lock Bits
1142E–AVR–02/03
To execute Page Write, set up the address in the Z-pointer, write “00101” to the five LSB
in SPMCR and execute SPM within four clock cycles after writing SPMCR. The data in
R1 and R0 is ignored. The page address must be written to Z13:Z7. During this opera-
tion, Z6:Z0 must be zero to ensure that the page is written correctly. It is recommended
that the interrupts are disabled during the page write operation.
Special care must be taken if the user allows the Boot Loader section to be updated by
leaving Boot Lock bit 11 unprogrammed. An accidental write to the Boot Loader itself
can corrupt the entire Boot Loader, and further software updates might be impossible. If
it is not necessary to change the Boot Loader software itself, it is recommended to pro-
gram the Boot Lock Bit 11 to protect the Boot Loader software from any internal
software changes.
Though the CPU is halted during Page Write, Page Erase or Lock bit write, for future
compatibility, the user software must poll for SPM complete by reading the SPMCR
Register and loop until the SPMEN bit is cleared after a programming operation. See
“Assembly code example for a Boot Loader” on page 141 for a code example.
To ensure proper instruction pipelining after programming action (Page Erase, Page
Write, or Lock bit write), the SPM instruction must be followed with the sequence (.dw
$FFFF - NOP) as shown below:
If not, the instruction following SPM might fail. It is not necessary to add this sequence
when the SPM instruction only loads the temporary buffer.
During Self-Programming (either Page Erase or Page Write), the user software should
not read the application section. The user software itself must prevent addressing this
section during the Self-Programming operations. This implies that interrupts must be
disabled. Before addressing the application section after the programming is completed,
for future compatibility, the user software must write “10001” to the five LSB in SPMCR
and execute SPM within four clock cycles. Then the user software should verify that the
ASB bit is cleared. See “Assembly code example for a Boot Loader” on page 141 for an
example. Though the ASB and ASRE bits have no special function in this device, it is
important for future code compatibility that they are treated as described above.
ATmega163 has two separate sets of Boot Lock bits which can be set independently.
This gives the user a unique flexibility to select different levels of protection.
The user can select:
•
•
•
•
See Table and Table for further details. The Boot Lock bits can be set in software and
in Serial or Parallel Programming mode, but they can only be cleared by a chip erase
command.
To protect the entire Flash from a software update by the MCU
To only protect the Boot Loader Flash section from a software update by the MCU
To only protect application Flash section from a software update by the MCU
Allowing software update in the entire Flash
spm
.dw $FFFF
nop
ATmega163(L)
137