ATMEGA163-8AI Atmel, ATMEGA163-8AI Datasheet - Page 45

• Manufacturer Part Number: ATMEGA163-8AI
• Description: IC AVR MCU 16K A/D 8MHZ 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA163-8AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Timer/Counter1 Control
Register B – TCCR1B
1142E–AVR–02/03
in the Timer. The automatic action programmed in COM1B1 and COM1B0 happens as if
a Compare Match had occurred, but no interrupt is generated. The corresponding I/O
pin must be set as an output pin for the FOC1B bit to have effect on the pin. The FOC1B
bit will always be read as zero. The setting of the FOC1B bit has no effect in PWM
mode.
• Bits 1..0 – PWM11, PWM10: Pulse Width Modulator Select Bits
These bits select PWM operation of Timer/Counter1 as specified in Table 11. This mode
is described on page 48.
Table 13. PWM Mode Select
• Bit 7 – ICNC1: Input Capture1 Noise Canceler (4 CKs)
When the ICNC1 bit is cleared (zero), the Input Capture trigger noise canceler function
is disabled. The Input Capture is triggered at the first rising/falling edge sampled on the
ICP – Input Capture Pin – as specified. When the ICNC1 bit is set (one), four successive
samples are measures on the ICP – Input Capture Pin, and all samples must be
high/low according to the Input Capture trigger specification in the ICES1 bit. The actual
sampling frequency is XTAL clock frequency.
• Bit 6 – ICES1: Input Capture1 Edge Select
While the ICES1 bit is cleared (zero), the Timer/Counter1 contents are transferred to the
Input Capture Register – ICR1 – on the falling edge of the Input Capture Pin – ICP.
While the ICES1 bit is set (one), the Timer/Counter1 contents are transferred to the
Input Capture Register – ICR1 – on the rising edge of the Input Capture Pin – ICP.
• Bits 5, 4 – Res: Reserved Bits
These bits are reserved bits in the ATmega163 and always read as zero.
• Bit 3 – CTC1: Clear Timer/Counter1 on Compare Match
When the CTC1 control bit is set (one), the Timer/Counter1 is Reset to $0000 in the
clock cycle after a Compare A Match. If the CTC1 control bit is cleared, Timer/Counter1
continues counting and is unaffected by a Compare Match. When a prescaling of 1 is
used, and the Compare A Register is set to C, the timer will count as follows if CTC1 is
set:
... | C-1 | C | 0 | 1 |...
Bit
$2E ($4E)
Read/Write
Initial Value
PWM11
0
0
1
1
ICNC1
R/W
7
0
PWM10
0
1
0
1
ICES1
R/W
6
0
Description
PWM operation of Timer/Counter1 is disabled
Timer/Counter1 is an 8-bit PWM
Timer/Counter1 is a 9-bit PWM
Timer/Counter1 is a 10-bit PWM
R
5
–
0
R
4
–
0
CTC1
R/W
3
0
CS12
R/W
2
0
ATmega163(L)
CS11
R/W
1
0
CS10
R/W
0
0
TCCR1B
45