ATMEGA323-8PI Atmel, ATMEGA323-8PI Datasheet - Page 182

• Manufacturer Part Number: ATMEGA323-8PI
• Description: IC AVR MCU 32K 8MHZ IND 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA323-8PI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA3238PI

Reading the Fuse and Lock
Bits from Software
EEPROM Write Prevents
Writing to SPMCR
Addressing the Flash During
Self-programming
182
ATmega323(L)
It is possible to read both the Fuse and Lock bits from software. To read the Lock bits,
load the Z-pointer with $0001 and set the BLBSET and SPMEN bits in SPMCR. When
an LPM instruction is executed within five CPU cycles after the BLBSET and SPMEN
bits are set in SPMCR, the value of the Lock bits will be loaded in the destination regis-
ter. The BLBSET and SPMEN bits will auto-clear upon completion of reading the Lock
bits or if no SPM, or LPM, instruction is executed within four, respectively five, CPU
cycles. When BLBSET and SPMEN are cleared, LPM will work as described in “Con-
stant Addressing Using the LPM and SPM Instructions” on page 16 and in the
Instruction set Manual.
The algorithm for reading the Fuse Low bits is similar to the one described above for
reading the Lock bits. To read the Fuse Low bits, load the Z-pointer with $0000 and set
the BLBSET and SPMEN bits in SPMCR. When an LPM instruction is executed within
five cycles after the BLBSET and SPMEN bits are set in the SPMCR, the value of the
Fuse Low bits will be loaded in the destination register as shown below.
Similarly, when reading the Fuse High bits, load $0003 in the Z-pointer. When an LPM
instruction is executed within five cycles after the BLBSET and SPMEN bits are set in
the SPMCR, the value of the Fuse High bits will be loaded in the destination register as
shown below.
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that
are unprogrammed, will be read as one.
In all cases, the read value of unused bit positions are undefined.
Note that an EEPROM write operation will block all software programming to Flash.
Reading the Fuses and Lock bits from software will also be prevented during the
EEPROM write operation. It is recommended that the user checks the status bit (EEWE)
in the EECR Register and verifies that the bit is cleared before writing to the SPMCR
Register. If EEPROM writing is performed inside an interrupt routine, the user software
should disable that interrupt before checking the EEWE status bit.
The Z-pointer is used to address the SPM commands.
Z15
Z14:Z7
Z6:Z1
Z0
The only operation that does not use the Z-pointer is Setting the Boot Loader Lock bits.
The content of the Z-pointer is ignored and will have no effect on the operation.
Bit
Rd
Bit
Rd
Bit
Rd
Bit
ZH (R31)
ZL (R30)
BODLEVEL
always ignored
page select, for page erase and page write
word select, for filling temp buffer (must be zero during page write operation)
should be zero for all SPM commands, byte select for the LPM instruction.
OCDEN
7
7
7
–
Z15
15
Z7
7
JTAGEN
BODEN
6
6
6
–
Z14
Z6
14
6
BLB12
SPIEN
5
–
5
5
Z13
13
Z5
5
BLB11
4
–
4
4
–
Z12
Z4
12
4
CKSEL3
BLB02
3
EESAVE
3
Z11
11
Z3
3
3
CKSEL2
BLB01
2
2
BOOTSZ1
Z10
10
Z2
2
2
CKSEL1
LB2
1
1
Z9
Z1
9
1
BOOTSZ0
1
LB1
1457G–AVR–09/03
CKSEL0
0
Z8
Z0
8
0
0
BOOTRST
0