PIC18F4431-E/ML Microchip Technology, PIC18F4431-E/ML Datasheet

IC MCU FLASH 8KX16 44QFN

PIC18F4431-E/ML

Manufacturer Part Number
PIC18F4431-E/ML
Description
IC MCU FLASH 8KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4431-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The PIC18F2331/2431/4331/4431 parts you have
received conform functionally to the Device Data Sheet
(DS39616), except for the anomalies described below.
Any Data Sheet Clarification issues related to the
PIC18F2331/2431/4331/4431 will be reported in a
separate Data Sheet errata. Please check the
Microchip web site for any existing issues.
All the issues listed here will be addressed in future
revisions of the PIC18F2331/2431/4331/4431 silicon.
The
PIC18F2331/2431/4331/4431 devices with these
Device/Revision IDs:
1. Module: PCPWM
© 2005 Microchip Technology Inc.
The Device IDs (DEVID1 and DEVID2) are located at
addresses
configuration space. They are shown in hexadecimal
in the format “DEVID2 DEVID1”.
Part Number
PIC18F2331
PIC18F2431
PIC18F4331
PIC18F4431
When the PCPWM is operated in Complementary
mode with a non-zero dead-time value and the
duty cycle results in an active-low time of less than
1 T
for a new PWM period and the PWM output will
alternate between one PWM period high and one
PWM period low.
Work around
When in Complementary mode with a non-zero
dead-time value, ensure that the active-low time
will always be greater than 1 T
when dead time is not equal to zero, ensure that:
Date Codes that pertain to this issue:
All engineering and production devices.
following
CY
PDCH:PDCL > (4 * (PTPERH:PTPERL + 1))
, the PWM generator will miss the rising edge
PDCH:PDCL < (4 * PTPERH:PTPERL)
PIC18F2331/2431/4331/4431 Rev. A3 Silicon Errata
3FFFFEh:3FFFFFh
silicon
00 1000 110
00 1000 101
00 1000 100
00 1000 111
Device ID
errata apply
or
CY
in
. In other words,
Revision ID
the
00010
00010
00010
00010
PIC18F2331/2431/4331/4431
only
device’s
to
2. Module: PCPWM
3. Module: PCPWM
When the PCPWM is operated in Center-Aligned
mode with double updates and the duty cycle
alternates on each update between a zero and
non-zero value, an incorrect waveform is gener-
ated (the PWM output will alternate between one
PWM period high and one PWM period low). If in
Complementary mode, dead time will not be
inserted properly.
Work around
Do not use zero duty cycle when in Center-Aligned
mode with double updates. Instead of zero, set the
duty cycle to a small, non-zero value.
Date Codes that pertain to this issue:
All engineering and production devices.
When the PCPWM is operated in Center-Aligned
mode with double updates and the duty cycle
alternates on each update between a greater than
100% duty cycle and a non-zero value, an incorrect
waveform is generated.
Work around
Do not use equal to or greater than 100% duty cycle
when in Center-Aligned mode with double updates.
Ensure that the maximum duty cycle value is
always smaller than or equal to the PWM period,
i.e., PDCH:PDCL ≤ (4 * (PTPERH:PTPERL)).
Date Codes that pertain to this issue:
All engineering and production devices.
DS80192C-page 1

Related parts for PIC18F4431-E/ML

PIC18F4431-E/ML Summary of contents

Page 1

... Device/Revision IDs: Part Number Device ID PIC18F2331 00 1000 111 PIC18F2431 00 1000 110 PIC18F4331 00 1000 101 PIC18F4431 00 1000 100 The Device IDs (DEVID1 and DEVID2) are located at addresses 3FFFFEh:3FFFFFh in configuration space. They are shown in hexadecimal in the format “DEVID2 DEVID1”. 1. Module: PCPWM When the PCPWM is operated in Complementary ...

Page 2

... TX pin is pulled high, either through an external resistor making the TX pin an output and writing ‘1’ to it, to not disturb the transmit line. PROCESSING THE CARRY BIT DURING BCD ADDITIONS ; .80 (BCD) ; .80 (BCD) ; test C ; inc next higher LSB ; test C ; inc next higher LSB © 2005 Microchip Technology Inc. ...

Page 3

... Work around Load the first character into TXREG and then wait for a TX interrupt, or check the TXIF bit before writing each additional character to TXREG. © 2005 Microchip Technology Inc. PIC18F2331/2431/4331/4431 14. Module: EUSART The EUSART cannot receive asynchronous data at the four fastest baud rates (BRGH = 1, BRG16 = 1 and SPBRG < ...

Page 4

... Characteristics) and 5 (LVD Characteristics). Rev B Document (12/2004) Added Data Sheet Clarification issue 6 (28-Pin QFN Diagram). Rev C Document (05/2005) Added silicon issue 15 (HSADC). All Data Sheet Clarifi- cation issues were removed and placed into a separate Data Sheet Errata. DS80192C-page 4 © 2005 Microchip Technology Inc. ...

Page 5

... PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance and WiperLock are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 6

... Fax: 65-6334-8850 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Taiwan - Hsinchu Tel: 886-3-572-9526 Fax: 886-3-572-6459 © 2005 Microchip Technology Inc. EUROPE Austria - Weis Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Ballerup Tel: 45-4450-2828 Fax: 45-4485-2829 France - Massy Tel: 33-1-69-53-63-20 ...

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