AT89C5131-TISIL Atmel, AT89C5131-TISIL Datasheet - Page 72

• Manufacturer Part Number: AT89C5131-TISIL
• Description: IC 8051 MCU FLASH 32K USB 28SOIC
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5131-TISIL

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: LED, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• For Use With: AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

72
AT89C5131
BRL - Baud Rate Reload Register for the internal baud rate generator, UART (9Ah)
Reset Value = 0000 0000b
Table 58. T2CON Register
T2CON - Timer 2 Control Register (C8h)
Reset Value = 0000 0000b
Bit addressable
Number
TF2
Bit
7
7
6
5
4
3
2
1
0
7
–
Mnemonic
CP/RL2#
EXEN2
EXF2
RCLK
C/T2#
EXF2
TCLK
TR2
Bit
TF2
6
6
–
Description
Timer 2 overflow Flag
Must be cleared by software.
Set by hardware on Timer 2 overflow, if RCLK = 0 and TCLK = 0.
Timer 2 External Flag
Set when a capture or a reload is caused by a negative transition on T2EX pin if
EXEN2 = 1.
When set, causes the CPU to vector to Timer 2 interrupt routine when Timer 2
interrupt is enabled.
Must be cleared by software. EXF2 doesn’t cause an interrupt in Up/down
counter mode (DCEN = 1)
Receive Clock bit for UART
Cleared to use Timer 1 overflow as receive clock for serial port in mode 1 or 3.
Set to use Timer 2 overflow as receive clock for serial port in mode 1 or 3.
Transmit Clock bit for UART
Cleared to use Timer 1 overflow as transmit clock for serial port in mode 1 or 3.
Set to use Timer 2 overflow as transmit clock for serial port in mode 1 or 3.
Timer 2 External Enable bit
Cleared to ignore events on T2EX pin for Timer 2 operation.
Set to cause a capture or reload when a negative transition on T2EX pin is
detected, if Timer 2 is not used to clock the serial port.
Timer 2 Run control bit
Cleared to turn off Timer 2.
Set to turn on Timer 2.
Timer/Counter 2 select bit
Cleared for timer operation (input from internal clock system: F
Set for counter operation (input from T2 input pin, falling edge trigger). Must be 0
for clock out mode.
Timer 2 Capture/Reload bit
If RCLK = 1 or TCLK = 1, CP/RL2# is ignored and timer is forced to Auto-reload
on Timer 2 overflow.
Cleared to Auto-reload on Timer 2 overflows or negative transitions on T2EX pin
if EXEN2 = 1.
Set to capture on negative transitions on T2EX pin if EXEN2 = 1.
RCLK
5
5
–
TCLK
4
4
–
EXEN2
3
3
–
TR2
2
2
–
C/T2#
1
–
1
CLK PERIPH
4136B–USB–09/03
CP/RL2#
).
0
–
0