TS87C54X2-VCB Atmel, TS87C54X2-VCB Datasheet - Page 8

• Manufacturer Part Number: TS87C54X2-VCB
• Description: IC MCU 8BIT 16K OTP 40MHZ 44PLCC
• Manufacturer: Atmel
• Series: 87Cr

Specifications of TS87C54X2-VCB

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40/30MHz
• Connectivity: UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

6. TS80C54/58X2 Enhanced Features
6.1
6.1.1
Figure 6-1.
8
XTAL1
X2 Feature
AT/TS8xC54/8X2
Description
F
XTAL
Clock Generation Diagram
2
In comparison to the original 80C52, the TS80C54/58X2 implements some new features, which
are
The TS80C54/58X2 core needs only 6 clock periods per machine cycle. This feature called ”X2”
provides the following advantages:
In order to keep the original C51 compatibility, a divider by 2 is inserted between the XTAL1 sig-
nal and the main clock input of the core (phase generator). This divider may be disabled by
software.
The clock for the whole circuit and peripheral is first divided by two before being used by the
CPU core and peripherals. This allows any cyclic ratio to be accepted on XTAL1 input. In X2
mode, as this divider is bypassed, the signals on XTAL1 must have a cyclic ratio between 40 to
60%. Figure 6-2. shows the clock generation block diagram. X2 bit is validated on XTAL1÷2 ris-
ing edge to avoid glitches when switching from X2 to STD mode. Figure 6-2. shows the mode
switching waveforms.
• The X2 option.
• The Dual Data Pointer.
• The Watchdog.
• The 4 level interrupt priority system.
• The power-off flag.
• The ONCE mode.
• The ALE disabling.
• Some enhanced features are also located in the UART and the timer 2.
• Divide frequency crystals by 2 (cheaper crystals) while keeping same CPU power.
• Save power consumption while keeping same CPU power (oscillator power saving).
• Save power consumption by dividing dynamically operating frequency by 2 in operating and
• Increase CPU power by 2 while keeping same crystal frequency.
:
idle modes.
XTAL1:2
CKCON reg
X2
0
1
F
OSC
CPU control
state machine: 6 clock cycles.
4431E–8051–04/06