AT80C51SND1C-ROTUL Atmel, AT80C51SND1C-ROTUL Datasheet - Page 65

• Manufacturer Part Number: AT80C51SND1C-ROTUL
• Description: IC MCU FLASH MP3 DECODER 80-TQFP
• Manufacturer: Atmel
• Series: 80Cr

Specifications of AT80C51SND1C-ROTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 44
• Program Memory Type: ROMless
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

13.1.3
13.2
13.2.1
4109L–8051–02/08
Audio Controls
MP3 Clock
Volume Control
consisting of data request and data acknowledgment is implemented. Each time the MP3
decoder needs MP3 data, it sets the MPREQ, MPFREQ and MPBREQ flags respectively in
MP3STA and MP3STA1 registers. MPREQ flag can generate an interrupt if enabled as
explained in Section “Interrupt”. The CPU must then load data in the buffer by writing it through
MP3DAT register thus acknowledging the previous request. As shown in Figure 13-2, the
MPFREQ flag remains set while data (i.e a frame) is requested by the decoder. It is cleared
when no more data is requested and set again when new data are requested. MPBREQ flag
toggles at every Byte writing.
Note:
Figure 13-2. Data Timing Diagram
The MP3 decoder clock is generated by division of the PLL clock. The division factor is given by
MPCD4:0 bits in MP3CLK register. Figure 13-3 shows the MP3 decoder clock generator and its
calculation formula. The MP3 decoder clock frequency depends only on the incoming MP3
frames.
Figure 13-3. MP3 Clock Generator and Symbol
As soon as the frame header has been decoded and the MPEG version extracted, the minimum
MP3 input frequency must be programmed according to Table 69.
Table 69. MP3 Clock Frequency
The MP3 decoder implements volume control on both right and left channels. The MP3VOR and
MP3VOL registers allow a 32-step volume control according to Table 70.
Write to MP3DAT
1. The first request after enable, consists in 1024 Bytes of data to fill in the input buffer.
MPBREQ Flag
MPFREQ Flag
CLOCK
MPREQ Flag
PLL
MPEG Version
Cleared when Reading MP3STA
II
MPCD4:0
I
MP3CLK
MP3clk
MP3 Decoder Clock
=
----------------------------
MPCD
PLLclk
+
1
Minimum MP3 Clock (MHz)
AT8xC51SND1C
10.5
21
MP3 Clock Symbol
CLOCK
MP3
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